Rafael Espindola 7b8bb89ecd Pass in a "const Triple &T" instead of a raw StringRef. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232429 91177308-0d34-0410-b5e6-96231b3b80d8		2015-03-16 22:29:29 +00:00
..
AsmParser	Fix uses of reserved identifiers starting with an underscore followed by an uppercase letter	2015-03-16 18:06:57 +00:00
InstPrinter	R600/SI: Remove _e32 and _e64 suffixes from mnemonics	2015-03-12 21:34:22 +00:00
MCTargetDesc	Pass in a "const Triple &T" instead of a raw StringRef.	2015-03-16 22:29:29 +00:00
TargetInfo	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
AMDGPU.h	[PM] Remove a bunch of stale TTI creation method declarations. I nuked	2015-02-01 00:22:15 +00:00
AMDGPU.td	R600/SI: Limit SGPRs to 80 on Tonga and Iceland	2015-03-09 15:48:09 +00:00
AMDGPUAlwaysInlinePass.cpp
AMDGPUAsmPrinter.cpp	R600/SI: Limit SGPRs to 80 on Tonga and Iceland	2015-03-09 15:48:09 +00:00
AMDGPUAsmPrinter.h	Remove the DisasmEnabled AsmPrinter variable and just look it	2015-02-19 01:10:49 +00:00
AMDGPUCallingConv.td
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUInstrInfo.cpp	Remove the need to cache the subtarget in the R600 TargetRegisterInfo	2015-03-11 18:43:21 +00:00
AMDGPUInstrInfo.h	ArrayRefize memory operand folding. NFC.	2015-02-28 12:04:00 +00:00
AMDGPUInstrInfo.td	R600: Use new fmad node.	2015-02-20 22:10:41 +00:00
AMDGPUInstructions.td	R600: Use new fmad node.	2015-02-20 22:10:41 +00:00
AMDGPUIntrinsicInfo.cpp
AMDGPUIntrinsicInfo.h
AMDGPUIntrinsics.td	R600/SI: Add an intrinsic for S_FLBIT_I32 / V_FFBH_I32	2015-03-04 17:33:45 +00:00
AMDGPUISelDAGToDAG.cpp	R600/SI: Add slc, glc, and tfe to non-atomic _ADDR64 instructions	2015-02-27 14:59:41 +00:00
AMDGPUISelLowering.cpp	R600/SI: Remove v_sub_f64 pseudo	2015-02-20 22:10:45 +00:00
AMDGPUISelLowering.h	R600: Use new fmad node.	2015-02-20 22:10:41 +00:00
AMDGPUMachineFunction.cpp	R600: Canonicalize access to function attributes, NFC	2015-02-14 02:45:45 +00:00
AMDGPUMachineFunction.h
AMDGPUMCInstLower.cpp	Grab the subtarget off of the machine function for the R600	2015-02-19 01:10:53 +00:00
AMDGPUMCInstLower.h	R600/SI: Don't shrink instructions whose e32 encoding doesn't exist	2015-01-15 18:42:51 +00:00
AMDGPUPromoteAlloca.cpp	Make DataLayout Non-Optional in the Module	2015-03-04 18:43:29 +00:00
AMDGPURegisterInfo.cpp	Remove the need to cache the subtarget in the R600 TargetRegisterInfo	2015-03-11 18:43:21 +00:00
AMDGPURegisterInfo.h	Remove the need to cache the subtarget in the R600 TargetRegisterInfo	2015-03-11 18:43:21 +00:00
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp	R600/SI: Limit SGPRs to 80 on Tonga and Iceland	2015-03-09 15:48:09 +00:00
AMDGPUSubtarget.h	R600/SI: Limit SGPRs to 80 on Tonga and Iceland	2015-03-09 15:48:09 +00:00
AMDGPUTargetMachine.cpp	Move the DataLayout to the generic TargetMachine, making it mandatory.	2015-03-12 00:07:24 +00:00
AMDGPUTargetMachine.h	Move the DataLayout to the generic TargetMachine, making it mandatory.	2015-03-12 00:07:24 +00:00
AMDGPUTargetTransformInfo.cpp	DataLayout is mandatory, update the API to reflect it with references.	2015-03-10 02:37:25 +00:00
AMDGPUTargetTransformInfo.h	[multiversion] Remove the function parameter from the unrolling	2015-02-01 14:31:23 +00:00
AMDILCFGStructurizer.cpp	r600: Clear visited structure before running.	2015-03-13 17:32:46 +00:00
AMDKernelCodeT.h	R600/SI: Emit amd_kernel_code_t header for AMDGPU environment	2014-12-02 22:00:07 +00:00
CaymanInstructions.td	R600/SI: Implement correct f64 fdiv	2015-02-14 04:30:08 +00:00
CIInstructions.td	Reuse a bunch of cached subtargets and remove getSubtarget calls	2015-01-30 23:24:40 +00:00
CMakeLists.txt	R600/SI: Spill VGPRs to scratch space for compute shaders	2015-01-14 15:42:31 +00:00
EvergreenInstructions.td	R600/SI: Implement correct f64 fdiv	2015-02-14 04:30:08 +00:00
LLVMBuild.txt
Makefile
Processors.td	R600/SI: Limit SGPRs to 80 on Tonga and Iceland	2015-03-09 15:48:09 +00:00
R600ClauseMergePass.cpp
R600ControlFlowFinalizer.cpp	Reuse a bunch of cached subtargets and remove getSubtarget calls	2015-01-30 23:24:40 +00:00
R600Defines.h
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp
R600InstrFormats.td
R600InstrInfo.cpp	Remove the need to cache the subtarget in the R600 TargetRegisterInfo	2015-03-11 18:43:21 +00:00
R600InstrInfo.h
R600Instructions.td	R600: Use new fmad node.	2015-02-20 22:10:41 +00:00
R600Intrinsics.td
R600ISelLowering.cpp	DataLayout is mandatory, update the API to reflect it with references.	2015-03-10 02:37:25 +00:00
R600ISelLowering.h	Reuse a bunch of cached subtargets and remove getSubtarget calls	2015-01-30 23:24:40 +00:00
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp	Remove a few more calls to TargetMachine::getSubtarget from the	2015-02-19 01:10:55 +00:00
R600MachineScheduler.h
R600OptimizeVectorRegisters.cpp
R600Packetizer.cpp	Reuse a bunch of cached subtargets and remove getSubtarget calls	2015-01-30 23:24:40 +00:00
R600RegisterInfo.cpp	Remove the need to cache the subtarget in the R600 TargetRegisterInfo	2015-03-11 18:43:21 +00:00
R600RegisterInfo.h	Remove the need to cache the subtarget in the R600 TargetRegisterInfo	2015-03-11 18:43:21 +00:00
R600RegisterInfo.td
R600Schedule.td
R600TextureIntrinsicsReplacer.cpp
R700Instructions.td	Reuse a bunch of cached subtargets and remove getSubtarget calls	2015-01-30 23:24:40 +00:00
SIAnnotateControlFlow.cpp	R600/SI: Fix bug from insertion of llvm.SI.end.cf into loop headers	2015-02-05 15:32:15 +00:00
SIDefines.h	R600/SI: Also enable WQM for image opcodes which calculate LOD v3	2015-02-06 02:51:20 +00:00
SIFixSGPRCopies.cpp	R600/SI: Remove VReg_32 register class	2015-01-07 20:59:25 +00:00
SIFixSGPRLiveRanges.cpp
SIFoldOperands.cpp	R600/SI: Fix asam errors in SIFoldOperands	2015-02-17 20:11:54 +00:00
SIInsertWaits.cpp	Remove the need to cache the subtarget in the R600 TargetRegisterInfo	2015-03-11 18:43:21 +00:00
SIInstrFormats.td	R600/SI: Remove _e32 and _e64 suffixes from mnemonics	2015-03-12 21:34:22 +00:00
SIInstrInfo.cpp	Remove the need to cache the subtarget in the R600 TargetRegisterInfo	2015-03-11 18:43:21 +00:00
SIInstrInfo.h	Remove the need to cache the subtarget in the R600 TargetRegisterInfo	2015-03-11 18:43:21 +00:00
SIInstrInfo.td	R600/SI: Don't print scc reg in sopc assembly string	2015-03-12 21:34:28 +00:00
SIInstructions.td	R600/SI: Remove _e32 and _e64 suffixes from mnemonics	2015-03-12 21:34:22 +00:00
SIIntrinsics.td
SIISelLowering.cpp	R600/SI: don't try min3/max3/med3 with f64	2015-03-16 15:53:55 +00:00
SIISelLowering.h	R600/SI: Remove isel mubuf legalization	2015-02-24 17:59:19 +00:00
SILoadStoreOptimizer.cpp	R600/SI: Move gds operand to the end of operand list	2015-03-09 18:49:54 +00:00
SILowerControlFlow.cpp	R600/SI: Don't enable WQM for V_INTERP_* instructions v2	2015-02-06 02:51:25 +00:00
SILowerI1Copies.cpp	R600/SI: Remove VReg_32 register class	2015-01-07 20:59:25 +00:00
SIMachineFunctionInfo.cpp	Remove a few more calls to TargetMachine::getSubtarget from the	2015-02-19 01:10:55 +00:00
SIMachineFunctionInfo.h	R600/SI: Add subtarget feature to enable VGPR spilling for all shader types	2015-01-20 19:33:04 +00:00
SIPrepareScratchRegs.cpp	R600/SI: Fix simple-loop.ll test	2015-01-20 19:33:02 +00:00
SIRegisterInfo.cpp	Remove the need to cache the subtarget in the R600 TargetRegisterInfo	2015-03-11 18:43:21 +00:00
SIRegisterInfo.h	Remove the need to cache the subtarget in the R600 TargetRegisterInfo	2015-03-11 18:43:21 +00:00
SIRegisterInfo.td	R600/SI: Remove unused register class	2015-03-06 17:00:16 +00:00
SISchedule.td	R600/SI: Define a schedule model	2015-01-14 01:13:19 +00:00
SIShrinkInstructions.cpp	R600/SI: Add 32-bit encoding of v_cndmask_b32	2015-03-10 16:16:44 +00:00
SITypeRewriter.cpp	R600: Canonicalize access to function attributes, NFC	2015-02-14 02:45:45 +00:00
VIInstrFormats.td	R600/SI: Rename dst encoding field to be consistent with docs	2015-02-18 02:15:37 +00:00
VIInstructions.td	R600/SI: Add VI versions of MUBUF loads and stores	2015-01-27 17:24:58 +00:00