llvm-6502/test/CodeGen/X86/2006-01-19-ISelFoldingBug.ll
David Blaikie 7c9c6ed761 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00

21 lines
821 B
LLVM

; RUN: llc < %s -march=x86 -mcpu=generic | \
; RUN: grep shld | count 1
;
; Check that the isel does not fold the shld, which already folds a load
; and has two uses, into a store.
@A = external global i32 ; <i32*> [#uses=2]
define i32 @test5(i32 %B, i8 %C) {
%tmp.1 = load i32, i32* @A ; <i32> [#uses=1]
%shift.upgrd.1 = zext i8 %C to i32 ; <i32> [#uses=1]
%tmp.2 = shl i32 %tmp.1, %shift.upgrd.1 ; <i32> [#uses=1]
%tmp.3 = sub i8 32, %C ; <i8> [#uses=1]
%shift.upgrd.2 = zext i8 %tmp.3 to i32 ; <i32> [#uses=1]
%tmp.4 = lshr i32 %B, %shift.upgrd.2 ; <i32> [#uses=1]
%tmp.5 = or i32 %tmp.4, %tmp.2 ; <i32> [#uses=2]
store i32 %tmp.5, i32* @A
ret i32 %tmp.5
}