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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
32 lines
1.3 KiB
LLVM
32 lines
1.3 KiB
LLVM
; RUN: llc < %s
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; rdar://5707064
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define i32 @f(i16* %pc) {
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entry:
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%acc = alloca i64, align 8 ; <i64*> [#uses=4]
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%tmp97 = load i64, i64* %acc, align 8 ; <i64> [#uses=1]
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%tmp98 = and i64 %tmp97, 4294967295 ; <i64> [#uses=1]
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%tmp99 = load i64, i64* null, align 8 ; <i64> [#uses=1]
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%tmp100 = and i64 %tmp99, 4294967295 ; <i64> [#uses=1]
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%tmp101 = mul i64 %tmp98, %tmp100 ; <i64> [#uses=1]
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%tmp103 = lshr i64 %tmp101, 0 ; <i64> [#uses=1]
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%tmp104 = load i64, i64* %acc, align 8 ; <i64> [#uses=1]
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%.cast105 = zext i32 32 to i64 ; <i64> [#uses=1]
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%tmp106 = lshr i64 %tmp104, %.cast105 ; <i64> [#uses=1]
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%tmp107 = load i64, i64* null, align 8 ; <i64> [#uses=1]
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%tmp108 = and i64 %tmp107, 4294967295 ; <i64> [#uses=1]
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%tmp109 = mul i64 %tmp106, %tmp108 ; <i64> [#uses=1]
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%tmp112 = add i64 %tmp109, 0 ; <i64> [#uses=1]
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%tmp116 = add i64 %tmp112, 0 ; <i64> [#uses=1]
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%tmp117 = add i64 %tmp103, %tmp116 ; <i64> [#uses=1]
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%tmp118 = load i64, i64* %acc, align 8 ; <i64> [#uses=1]
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%tmp120 = lshr i64 %tmp118, 0 ; <i64> [#uses=1]
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%tmp121 = load i64, i64* null, align 8 ; <i64> [#uses=1]
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%tmp123 = lshr i64 %tmp121, 0 ; <i64> [#uses=1]
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%tmp124 = mul i64 %tmp120, %tmp123 ; <i64> [#uses=1]
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%tmp126 = shl i64 %tmp124, 0 ; <i64> [#uses=1]
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%tmp127 = add i64 %tmp117, %tmp126 ; <i64> [#uses=1]
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store i64 %tmp127, i64* %acc, align 8
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ret i32 0
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}
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