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7c9c6ed761
Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
56 lines
1.8 KiB
LLVM
56 lines
1.8 KiB
LLVM
; RUN: opt -S -gvn -enable-load-pre < %s | FileCheck %s
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;
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; Make sure the load in bb3.backedge is removed and moved into bb1 after the
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; call. This makes the non-call case faster.
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;
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; This test is derived from this C++ code (GCC PR 37810):
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; void g();
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; struct A {
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; int n; int m;
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; A& operator++(void) { ++n; if (n == m) g(); return *this; }
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; A() : n(0), m(0) { }
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; friend bool operator!=(A const& a1, A const& a2) { return a1.n != a2.n; }
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; };
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; void testfunction(A& iter) { A const end; while (iter != end) ++iter; }
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;
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
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target triple = "i386-apple-darwin7"
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%struct.A = type { i32, i32 }
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define void @_Z12testfunctionR1A(%struct.A* %iter) {
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entry:
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%0 = getelementptr %struct.A, %struct.A* %iter, i32 0, i32 0 ; <i32*> [#uses=3]
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%1 = load i32, i32* %0, align 4 ; <i32> [#uses=2]
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%2 = icmp eq i32 %1, 0 ; <i1> [#uses=1]
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br i1 %2, label %return, label %bb.nph
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bb.nph: ; preds = %entry
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%3 = getelementptr %struct.A, %struct.A* %iter, i32 0, i32 1 ; <i32*> [#uses=1]
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br label %bb
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bb: ; preds = %bb3.backedge, %bb.nph
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%.rle = phi i32 [ %1, %bb.nph ], [ %7, %bb3.backedge ] ; <i32> [#uses=1]
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%4 = add i32 %.rle, 1 ; <i32> [#uses=2]
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store i32 %4, i32* %0, align 4
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%5 = load i32, i32* %3, align 4 ; <i32> [#uses=1]
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%6 = icmp eq i32 %4, %5 ; <i1> [#uses=1]
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br i1 %6, label %bb1, label %bb3.backedge
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bb1: ; preds = %bb
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tail call void @_Z1gv()
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br label %bb3.backedge
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bb3.backedge: ; preds = %bb, %bb1
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; CHECK: bb3.backedge:
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; CHECK-NEXT: phi
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; CHECK-NEXT: icmp
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%7 = load i32, i32* %0, align 4 ; <i32> [#uses=2]
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%8 = icmp eq i32 %7, 0 ; <i1> [#uses=1]
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br i1 %8, label %return, label %bb
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return: ; preds = %bb3.backedge, %entry
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ret void
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}
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declare void @_Z1gv()
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