James Y Knight ccafe05df1 Sparc: support the "set" synthetic instruction. ... This pseudo-instruction expands into 'sethi' and 'or' instructions, or, just one of them, if the other isn't necessary for a given value. Differential Revision: http://reviews.llvm.org/D9089 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237585 91177308-0d34-0410-b5e6-96231b3b80d8		2015-05-18 16:43:33 +00:00
..
lit.local.cfg
sparc64-alu-instructions.s
sparc64-ctrl-instructions.s
sparc-alu-instructions.s
sparc-assembly-exprs.s	Make Sparc assembler accept parenthesized constant expressions.	2015-04-29 18:48:29 +00:00
sparc-atomic-instructions.s	Sparc: Add the "alternate address space" load/store instructions.	2015-05-18 16:35:04 +00:00
sparc-ctrl-instructions.s	Sparc: Prefer reg+reg address encoding when only one register used.	2015-04-29 14:54:44 +00:00
sparc-directive-xword.s
sparc-directives.s
sparc-fp-instructions.s
sparc-little-endian.s	[Sparc] Repair fixups in little endian mode.	2015-05-01 17:13:02 +00:00
sparc-mem-instructions.s	Sparc: Add the "alternate address space" load/store instructions.	2015-05-18 16:35:04 +00:00
sparc-nop-data.s
sparc-pic.s
sparc-relocations.s
sparc-special-registers.s	Sparc: Support PSR, TBR, WIM read/write instructions.	2015-05-18 16:38:47 +00:00
sparc-synthetic-instructions.s	Sparc: support the "set" synthetic instruction.	2015-05-18 16:43:33 +00:00
sparc-vis.s
sparcv8-instructions.s
sparcv9-atomic-instructions.s	Sparc: Add the "alternate address space" load/store instructions.	2015-05-18 16:35:04 +00:00
sparcv9-instructions.s