Tim Northover 7c3e057ff4 Intrinsics: add LLVMHalfElementsVectorType constraint ... This is like the LLVMMatchType, except the verifier checks that the second argument is a vector with the same base type and half the number of elements. This will be used by the ARM64 backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205079 91177308-0d34-0410-b5e6-96231b3b80d8		2014-03-29 07:04:54 +00:00
..
Analysis	PR15967 Fix in basicaa for faulty returning no alias.	2014-03-26 21:30:19 +00:00
AsmParser
Bitcode	All new elements except the last one initialized to NULL. Ideally, once parsing is complete, all elements should be non-NULL.	2014-03-27 12:08:23 +00:00
CodeGen	Provide a target override for the cost of using a callee-saved register	2014-03-27 23:10:04 +00:00
DebugInfo	DebugInfo: Support debug_loc under fission	2014-03-25 01:44:02 +00:00
ExecutionEngine	Add ARM big endian Target (armeb, thumbeb)	2014-03-28 14:35:30 +00:00
IR	Intrinsics: add LLVMHalfElementsVectorType constraint	2014-03-29 07:04:54 +00:00
IRReader
LineEditor
Linker
LTO
MC	Completely rewrite ELFObjectWriter::RecordRelocation.	2014-03-29 06:26:49 +00:00
Object
Option
ProfileData
Support	Windows: canonicalise the default windows triple	2014-03-29 01:08:53 +00:00
TableGen
Target	Completely rewrite ELFObjectWriter::RecordRelocation.	2014-03-29 06:26:49 +00:00
Transforms	SLPVectorizer: Take credit for free extractelement instructions	2014-03-28 17:21:32 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile