llvm-6502/test/CodeGen
Tim Northover 7c4342e90b ARM: fix folding of stack-adjustment (yet again).
When trying to eliminate an "sub sp, sp, #N" instruction by folding
it into an existing push/pop using dummy registers, we need to account
for the fact that this might affect precisely how "fp" gets set in the
prologue.

We were attempting this, but assuming that *whenever* we performed a
fold it would make a difference. This is false, for example, in:
    push {r4, r7, lr}
    add fp, sp, #4
    vpush {d8}
    sub sp, sp, #8

we can fold the "sub" into the "vpush", forming "vpush {d7, d8}".
However, in that case the "add fp" instruction mustn't change, which
we were getting wrong before.

Should fix PR18160.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196725 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-08 15:56:50 +00:00
..
AArch64 For AArch64, add missing register cost calculation for big value types like v4i64 and v8i64. 2013-12-05 02:12:01 +00:00
ARM ARM: fix folding of stack-adjustment (yet again). 2013-12-08 15:56:50 +00:00
CPP [tests] Cleanup initialization of test suffixes. 2013-08-16 00:37:11 +00:00
Generic Revert r195317 (and r195333), "Teach ISel not to optimize 'optnone' functions." 2013-11-21 10:55:15 +00:00
Hexagon Debug Info: update testing cases to specify the debug info version number. 2013-11-22 21:49:45 +00:00
Inputs Debug Info: update testing cases to specify the debug info version number. 2013-11-22 21:49:45 +00:00
Mips [mips] Fix test case. 2013-12-07 02:48:29 +00:00
MSP430 Make sure SP is always aligned on a 2 byte boundary 2013-10-24 09:32:31 +00:00
NVPTX [NVPTX] Fix off-by-one error when creating the VT list for an SDNode 2013-12-05 12:58:00 +00:00
PowerPC Correct word hyphenations 2013-12-05 05:44:44 +00:00
R600 Add a RequireStructuredCFG Field to TargetMachine. 2013-12-07 01:49:19 +00:00
SPARC [Sparc] Emit large negative adjustments to SP/FP with sethi+xor instead of sethi+or. This generates correct code for both sparc32 and sparc64. 2013-11-24 20:23:25 +00:00
SystemZ [SystemZ] Use LOAD AND TEST for comparisons with -0 2013-12-06 09:59:12 +00:00
Thumb Use FileCheck and expand the test a bit. 2013-11-27 19:22:14 +00:00
Thumb2 Add support for parsing ARM symbol variants on ELF targets 2013-12-04 22:43:20 +00:00
X86 Update AVX512 vector blend intrinsic names. 2013-12-06 13:35:35 +00:00
XCore XCore target: Make handling of large frames not dependent upon an FP. 2013-12-02 11:05:28 +00:00