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7c6f90d486
llvm-6502/test/MC
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Ulrich Weigand 7c6f90d486 [PowerPC] Support branch mnemonics with implied CR0 
The extended branch mnemonics are supposed to use an implied CR0
if there is no explicit condition register specified.  This patch
adds extra variants of the mnemonics to this effect.

Problem reported by Joerg Sonnenberger.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183686 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-10 17:19:15 +00:00
..
AArch64 Change how we iterate over relocations on ELF. 2013-05-30 03:05:14 +00:00
ARM ARM: ISB cannot be passed the same options as DMB 2013-06-10 14:17:08 +00:00
AsmParser
COFF
Disassembler ARM: ISB cannot be passed the same options as DMB 2013-06-10 14:17:08 +00:00
ELF Don't hide the first ELF symbol. 2013-06-05 20:33:54 +00:00
MachO
Markup
MBlaze
Mips Change how we iterate over relocations on ELF. 2013-05-30 03:05:14 +00:00
PowerPC [PowerPC] Support branch mnemonics with implied CR0 2013-06-10 17:19:15 +00:00
SystemZ [SystemZ] Immediate compare-and-branch support 2013-05-29 11:58:52 +00:00
X86