llvm-6502/include/llvm/Target
Lang Hames d693cafcfb Add DAG-combines for aggressive FMA formation.
This patch adds DAG combines to form FMAs from pairs of FADD + FMUL or
FSUB + FMUL. The combines are performed when:
(a) Either
      AllowExcessFPPrecision option (-enable-excess-fp-precision for llc)
        OR
      UnsafeFPMath option (-enable-unsafe-fp-math)
    are set, and
(b) TargetLoweringInfo::isFMAFasterThanMulAndAdd(VT) is true for the type of
    the FADD/FSUB, and
(c) The FMUL only has one user (the FADD/FSUB).

If your target has fast FMA instructions you can make use of these combines by
overriding TargetLoweringInfo::isFMAFasterThanMulAndAdd(VT) to return true for
types supported by your FMA instruction, and adding patterns to match ISD::FMA
to your FMA instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158757 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-19 22:51:23 +00:00
..
Mangler.h
Target.td Teach tblgen's set theory "sequence" operator to support an optional stride operand. 2012-05-24 21:37:08 +00:00
TargetCallingConv.h Convert comments to proper Doxygen comments. 2012-06-09 00:01:45 +00:00
TargetCallingConv.td
TargetData.h Convert comments to proper Doxygen comments. 2012-06-09 00:01:45 +00:00
TargetELFWriterInfo.h [Hexagon] Clean up Hexagon ELF definition. 2012-05-17 16:46:46 +00:00
TargetFrameLowering.h
TargetInstrInfo.h *typo: Cyles changed to Cycles 2012-06-13 15:53:04 +00:00
TargetIntrinsicInfo.h
TargetJITInfo.h
TargetLibraryInfo.h
TargetLowering.h Add a new intrinsic: llvm.fmuladd. This intrinsic represents a multiply-add 2012-06-05 19:07:46 +00:00
TargetLoweringObjectFile.h
TargetMachine.h
TargetOpcodes.h
TargetOptions.h Add DAG-combines for aggressive FMA formation. 2012-06-19 22:51:23 +00:00
TargetRegisterInfo.h Add a PrintRegUnit helper similar to PrintReg. 2012-05-31 17:18:29 +00:00
TargetSchedule.td misched: Added MultiIssueItineraries. 2012-06-05 03:44:40 +00:00
TargetSelectionDAG.td
TargetSelectionDAGInfo.h
TargetSubtargetInfo.h