mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-17 18:10:31 +00:00
5ddb087f7f
of the intrinsics. The goal is to auto-generate both support for GCC-style (vector) and ARM-style (struct of vector) intrinsics. This is work in progress, but will be completed soon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104910 91177308-0d34-0410-b5e6-96231b3b80d8
46 lines
1.0 KiB
CMake
46 lines
1.0 KiB
CMake
add_executable(tblgen
|
|
ARMDecoderEmitter.cpp
|
|
AsmMatcherEmitter.cpp
|
|
AsmWriterEmitter.cpp
|
|
AsmWriterInst.cpp
|
|
CallingConvEmitter.cpp
|
|
ClangASTNodesEmitter.cpp
|
|
ClangDiagnosticsEmitter.cpp
|
|
CodeEmitterGen.cpp
|
|
CodeGenDAGPatterns.cpp
|
|
CodeGenInstruction.cpp
|
|
CodeGenTarget.cpp
|
|
DAGISelEmitter.cpp
|
|
DAGISelMatcherEmitter.cpp
|
|
DAGISelMatcherGen.cpp
|
|
DAGISelMatcherOpt.cpp
|
|
DAGISelMatcher.cpp
|
|
DisassemblerEmitter.cpp
|
|
EDEmitter.cpp
|
|
FastISelEmitter.cpp
|
|
InstrEnumEmitter.cpp
|
|
InstrInfoEmitter.cpp
|
|
IntrinsicEmitter.cpp
|
|
LLVMCConfigurationEmitter.cpp
|
|
NeonEmitter.cpp
|
|
OptParserEmitter.cpp
|
|
Record.cpp
|
|
RegisterInfoEmitter.cpp
|
|
SubtargetEmitter.cpp
|
|
TGLexer.cpp
|
|
TGParser.cpp
|
|
TGValueTypes.cpp
|
|
TableGen.cpp
|
|
TableGenBackend.cpp
|
|
X86DisassemblerTables.cpp
|
|
X86RecognizableInstr.cpp
|
|
)
|
|
|
|
target_link_libraries(tblgen LLVMSupport LLVMSystem)
|
|
if( MINGW )
|
|
target_link_libraries(tblgen imagehlp psapi)
|
|
endif( MINGW )
|
|
if( LLVM_ENABLE_THREADS AND HAVE_LIBPTHREAD )
|
|
target_link_libraries(tblgen pthread)
|
|
endif()
|