llvm-6502/test/CodeGen
Tilmann Scheller 7cd0201f02 [ARM] Add earlyclobber constraint to pre/post-indexed ARM STR instructions.
The post-indexed instructions were missing the constraint, causing unpredictable STR instructions to be emitted.

The earlyclobber constraint on the pre-indexed STR instructions is not strictly necessary, as the instruction selection for pre-indexed STR instructions goes through an additional layer of pseudo instructions which have the constraint defined, however it doesn't hurt to specify the constraint directly on the pre-indexed instructions as well, since at some point someone might create instances of them programmatically and then the constraint is definitely needed.

This fixes PR20323.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213369 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-18 12:05:49 +00:00
..
AArch64 AArch64: Constant fold converting vector setcc results to float. 2014-07-18 00:40:52 +00:00
ARM [ARM] Add earlyclobber constraint to pre/post-indexed ARM STR instructions. 2014-07-18 12:05:49 +00:00
CPP
Generic
Hexagon
Inputs
Mips
MSP430
NVPTX NVPTX: support direct f16 <-> f64 conversions via intrinsics. 2014-07-18 08:30:10 +00:00
PowerPC
R600 R600: rename misleading fp16 test. 2014-07-18 08:43:30 +00:00
SPARC
SystemZ
Thumb
Thumb2
X86 X86: Constant fold converting vector setcc results to float. 2014-07-18 00:40:56 +00:00
XCore