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AArch64
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CHECK-LABEL-ify tests
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2013-08-09 17:50:15 +00:00 |
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ARM
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DAG: Combine (and (setne X, 0), (setne X, -1)) -> (setuge (add X, 1), 2)
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2013-08-13 21:30:58 +00:00 |
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CPP
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test commit: remove blank line.
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2013-03-14 05:43:59 +00:00 |
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Generic
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Debug Info: clean up usage of Verify.
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2013-06-28 05:43:10 +00:00 |
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Hexagon
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Refactor isInTailCallPosition handling
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2013-08-06 09:12:35 +00:00 |
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Inputs
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Debug Info Verifier: verify SPs in llvm.dbg.sp.
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2013-07-27 01:26:08 +00:00 |
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Mips
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[mips] Properly parse registers that appear in inline-asm constraints.
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2013-08-14 00:21:25 +00:00 |
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MSP430
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Use conventional syntax for branches.
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2013-07-14 18:19:44 +00:00 |
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NVPTX
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[NVPTX] Add missing patterns for i1 [s,u]int_to_fp
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2013-08-06 14:13:34 +00:00 |
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PowerPC
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Fix FileCheck --check-prefix lines.
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2013-08-12 12:43:26 +00:00 |
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R600
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R600: Set scheduling preference to Sched::Source
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2013-08-12 22:33:21 +00:00 |
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SI
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SPARC
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Allocate local registers in order for optimal coloring.
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2013-07-25 18:35:14 +00:00 |
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SystemZ
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[SystemZ] Use CLC and IPM to implement memcmp
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2013-08-12 10:28:10 +00:00 |
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Thumb
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Debug Info: update testing cases to pass verifier.
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2013-07-29 18:12:58 +00:00 |
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Thumb2
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Refactor AnalyzeBranch on ARM. The previous version did not always analyze
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2013-07-19 23:52:47 +00:00 |
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X86
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llvm/test/CodeGen/X86/setcc-sentinals.ll: Relax expressions for x86_64-win32.
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2013-08-14 00:46:00 +00:00 |
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XCore
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XCore target: Fix Vararg handling
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2013-08-01 08:29:44 +00:00 |
7cd85b7492