Jiangning Liu d7689b6ff6 [ARM64] Fix a bug in shuffle vector lowering to generate corect vext ISD with swapped input vectors. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209495 91177308-0d34-0410-b5e6-96231b3b80d8

2014-05-23 02:54:50 +00:00

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AsmParser

ARM64: model pre/post-indexed operations properly.

2014-05-22 11:56:20 +00:00

Disassembler

ARM64: model pre/post-indexed operations properly.

2014-05-22 11:56:20 +00:00

InstPrinter

ARM64: remove '#' from annotation of add/sub immediate

2014-05-22 14:20:05 +00:00

MCTargetDesc

ARM64: separate load/store operands to simplify assembler

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TargetInfo

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Utils

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ARM64.h

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ARM64.td

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ARM64AddressTypePromotion.cpp

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ARM64AdvSIMDScalarPass.cpp

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ARM64AsmPrinter.cpp

ARM64: model pre/post-indexed operations properly.

2014-05-22 11:56:20 +00:00

ARM64BranchRelaxation.cpp

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ARM64CallingConv.h

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ARM64CallingConvention.td

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ARM64CleanupLocalDynamicTLSPass.cpp

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ARM64CollectLOH.cpp

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ARM64ConditionalCompares.cpp

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ARM64DeadRegisterDefinitionsPass.cpp

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ARM64ExpandPseudoInsts.cpp

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ARM64FastISel.cpp

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ARM64FrameLowering.cpp

ARM64: model pre/post-indexed operations properly.

2014-05-22 11:56:20 +00:00

ARM64FrameLowering.h

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ARM64InstrAtomics.td

ARM64: separate load/store operands to simplify assembler

2014-05-22 11:56:09 +00:00

ARM64InstrFormats.td

ARM64: model pre/post-indexed operations properly.

2014-05-22 11:56:20 +00:00

ARM64InstrInfo.cpp

ARM64: model pre/post-indexed operations properly.

2014-05-22 11:56:20 +00:00

ARM64InstrInfo.h

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ARM64InstrInfo.td

ARM64: these work too

2014-05-22 12:14:49 +00:00

ARM64ISelDAGToDAG.cpp

ARM64: model pre/post-indexed operations properly.

2014-05-22 11:56:20 +00:00

ARM64ISelLowering.cpp

[ARM64] Fix a bug in shuffle vector lowering to generate corect vext ISD with swapped input vectors.

2014-05-23 02:54:50 +00:00

ARM64ISelLowering.h

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ARM64LoadStoreOptimizer.cpp

ARM64: model pre/post-indexed operations properly.

2014-05-22 11:56:20 +00:00

ARM64MachineFunctionInfo.h

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ARM64MCInstLower.cpp

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ARM64MCInstLower.h

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ARM64PerfectShuffle.h

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ARM64PromoteConstant.cpp

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ARM64RegisterInfo.cpp

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ARM64RegisterInfo.h

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ARM64RegisterInfo.td

ARM64: separate load/store operands to simplify assembler

2014-05-22 11:56:09 +00:00

ARM64SchedA53.td

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ARM64SchedCyclone.td

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ARM64Schedule.td

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ARM64SelectionDAGInfo.cpp

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ARM64SelectionDAGInfo.h

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ARM64StorePairSuppress.cpp

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ARM64Subtarget.cpp

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ARM64Subtarget.h

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ARM64TargetMachine.cpp

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ARM64TargetMachine.h

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ARM64TargetObjectFile.cpp

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ARM64TargetObjectFile.h

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ARM64TargetTransformInfo.cpp

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CMakeLists.txt

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LLVMBuild.txt

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Makefile

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