llvm-6502/test/CodeGen
Dale Johannesen 7d07b48b26 Fix i64->f64 conversion, x86-64, -no-sse. A bit
tricky since there's a 3rd 64-bit type, MMX vectors.
PR 7135.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104308 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21 00:52:33 +00:00
..
Alpha
ARM Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float). 2010-05-21 00:43:17 +00:00
Blackfin
CBackend
CellSPU Make SPU backend not assert on jump tables. 2010-05-11 11:00:02 +00:00
CPP
Generic Enable a bunch more -regalloc=fast tests 2010-05-12 00:11:24 +00:00
MBlaze
Mips
MSP430 Insert ANY_EXTEND node instead of invalid truncate during DAG Combining (X & 1), 2010-05-01 12:52:34 +00:00
PIC16
PowerPC Only use clairvoyance when defining a register, and then only if it has one use. 2010-05-17 04:50:57 +00:00
SPARC
SystemZ SystemZ really does mean "has calls" and not just "adjusts stack." Go ahead and 2010-05-14 22:17:42 +00:00
Thumb Enable a bunch more -regalloc=fast tests 2010-05-12 00:11:24 +00:00
Thumb2 t2LEApcrel and tLEApcrel are re-materializable. This makes it possible to hoist more loads during machine LICM. 2010-05-19 07:28:01 +00:00
X86 Fix i64->f64 conversion, x86-64, -no-sse. A bit 2010-05-21 00:52:33 +00:00
XCore