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https://github.com/c64scene-ar/llvm-6502.git
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ae3a0be92e
integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
27 lines
1.2 KiB
LLVM
27 lines
1.2 KiB
LLVM
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \
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; RUN: grep {pre-alloc-split} | grep {Number of intervals split} | grep 2
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define i32 @main(i32 %argc, i8** %argv) nounwind {
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entry:
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br label %bb
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bb: ; preds = %bb, %entry
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%k.0.reg2mem.0 = phi double [ 1.000000e+00, %entry ], [ %6, %bb ] ; <double> [#uses=2]
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%Flint.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %5, %bb ] ; <double> [#uses=1]
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%twoThrd.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %1, %bb ] ; <double> [#uses=1]
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%0 = tail call double @llvm.pow.f64(double 0x3FE5555555555555, double 0.000000e+00) ; <double> [#uses=1]
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%1 = fadd double %0, %twoThrd.0.reg2mem.0 ; <double> [#uses=1]
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%2 = tail call double @sin(double %k.0.reg2mem.0) nounwind readonly ; <double> [#uses=1]
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%3 = fmul double 0.000000e+00, %2 ; <double> [#uses=1]
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%4 = fdiv double 1.000000e+00, %3 ; <double> [#uses=1]
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store double %Flint.0.reg2mem.0, double* null
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store double %twoThrd.0.reg2mem.0, double* null
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%5 = fadd double %4, %Flint.0.reg2mem.0 ; <double> [#uses=1]
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%6 = fadd double %k.0.reg2mem.0, 1.000000e+00 ; <double> [#uses=1]
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br label %bb
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}
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declare double @llvm.pow.f64(double, double) nounwind readonly
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declare double @sin(double) nounwind readonly
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