mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-21 02:29:22 +00:00
5bafff36c7
This is still a work in progress but most of the NEON instruction set is supported. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73919 91177308-0d34-0410-b5e6-96231b3b80d8
23 lines
902 B
LLVM
23 lines
902 B
LLVM
; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | grep fldd | count 4
|
|
; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | grep fstd
|
|
; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | grep fmrrd
|
|
|
|
define void @t1(<2 x i32>* %r, <4 x i16>* %a, <4 x i16>* %b) nounwind {
|
|
entry:
|
|
%0 = load <4 x i16>* %a, align 8 ; <<4 x i16>> [#uses=1]
|
|
%1 = load <4 x i16>* %b, align 8 ; <<4 x i16>> [#uses=1]
|
|
%2 = add <4 x i16> %0, %1 ; <<4 x i16>> [#uses=1]
|
|
%3 = bitcast <4 x i16> %2 to <2 x i32> ; <<2 x i32>> [#uses=1]
|
|
store <2 x i32> %3, <2 x i32>* %r, align 8
|
|
ret void
|
|
}
|
|
|
|
define <2 x i32> @t2(<4 x i16>* %a, <4 x i16>* %b) nounwind readonly {
|
|
entry:
|
|
%0 = load <4 x i16>* %a, align 8 ; <<4 x i16>> [#uses=1]
|
|
%1 = load <4 x i16>* %b, align 8 ; <<4 x i16>> [#uses=1]
|
|
%2 = sub <4 x i16> %0, %1 ; <<4 x i16>> [#uses=1]
|
|
%3 = bitcast <4 x i16> %2 to <2 x i32> ; <<2 x i32>> [#uses=1]
|
|
ret <2 x i32> %3
|
|
}
|