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concept level stuff at this point, but it is generally working for those instructions that know how to map the operands. This patch fills in the register operands for add/sub/or/etc instructions and adds the conditional execution predicate encoding. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116112 91177308-0d34-0410-b5e6-96231b3b80d8 |
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arm_instructions.s | ||
arm_word_directive.s | ||
dg.exp | ||
simple-encoding.ll |