llvm-6502/test/CodeGen/X86/prefetch.ll
Bruno Cardoso Lopes 9a767330f5 Add one more argument to the prefetch intrinsic to indicate whether it's a data
or instruction cache access. Update the targets to match it and also teach
autoupgrade.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132976 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 04:58:37 +00:00

17 lines
507 B
LLVM

; RUN: llc < %s -march=x86 -mattr=+sse | FileCheck %s
define void @t(i8* %ptr) nounwind {
entry:
; CHECK: prefetcht2
; CHECK: prefetcht1
; CHECK: prefetcht0
; CHECK: prefetchnta
tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 1, i32 1 )
tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 2, i32 1 )
tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3, i32 1 )
tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 0, i32 1 )
ret void
}
declare void @llvm.prefetch(i8*, i32, i32, i32) nounwind