llvm-6502/test/CodeGen
Chandler Carruth 7d64681274 [x86] Fix a few more tiny patterns with the new vector shuffle lowering
that keep cropping up in the regression test suite.

This also addresses one of the issues raised on the mailing list with
failing to form 'movsd' in as many cases as we realistically should.
There will be corresponding patches forthcoming for v4f32 at least. This
was a lot of fuss for a relatively small gain, but all the fuss was on
my end trying different ways of holding the pieces of the x86 fragment
patterns *just right*. Now that it works, the code is reasonably simple.

In the new test cases I'm adding here, v2i64 sticks out as just plain
horrible. I've not come up with any great ideas here other than that it
would be nice to recognize when we're *going* to take a domain crossing
hit and cross earlier to get the decent instructions. At least with AVX
it is slightly less silly....

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218756 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-01 11:14:02 +00:00
..
AArch64 Add missing natual vector cast. 2014-10-01 09:59:45 +00:00
ARM [ARM] Add support for Cortex-M7, FPv5-SP and FPv5-DP (LLVM) 2014-10-01 09:02:17 +00:00
CPP
Generic
Hexagon Add missing attributes !cmp.[eq,gt,gtu] instructions. 2014-09-25 13:09:54 +00:00
Inputs
Mips [mips] For indirect calls we don't need $gp to point to .got. Mips linker 2014-10-01 08:22:21 +00:00
MSP430
NVPTX
PowerPC Refactor reciprocal and reciprocal square root estimate into target-independent functions (part 2). 2014-09-26 23:01:47 +00:00
R600 R600/SI: Fix printing of clamp and omod 2014-09-30 19:49:48 +00:00
SPARC
SystemZ
Thumb [Thumb] Make load/store optimizer less conservative. 2014-09-24 16:35:50 +00:00
Thumb2 [ARM] Add support for Cortex-M7, FPv5-SP and FPv5-DP (LLVM) 2014-10-01 09:02:17 +00:00
X86 [x86] Fix a few more tiny patterns with the new vector shuffle lowering 2014-10-01 11:14:02 +00:00
XCore