llvm-6502/lib/Target/X86
2005-12-27 03:02:18 +00:00
..
.cvsignore
Makefile initial step at adding a dag-to-dag isel for X86 backend. Patch contributed 2005-11-16 01:54:32 +00:00
README.txt Added an idea about any_extend for performance tuning. 2005-12-17 06:54:43 +00:00
X86.h Only lower SELECT when using DAG based isel. 2005-12-17 01:22:13 +00:00
X86.td
X86AsmPrinter.cpp Use the shared asmprinter code for printing special llvm globals 2005-12-13 06:32:50 +00:00
X86AsmPrinter.h Use the shared asmprinter code for printing special llvm globals 2005-12-13 06:32:50 +00:00
X86ATTAsmPrinter.cpp Don't globalize internal functions 2005-12-16 00:07:30 +00:00
X86ATTAsmPrinter.h No longer track value types for asm printer operands, and remove them as 2005-11-30 18:54:35 +00:00
X86CodeEmitter.cpp
X86ELFWriter.cpp
X86FloatingPoint.cpp Rewrite FP stackifier support in the X86InstrInfo.td file, splitting patterns 2005-12-21 07:47:04 +00:00
X86InstrBuilder.h
X86InstrInfo.cpp Properly split f32 and f64 into separate register classes for scalar sse fp 2005-10-14 22:06:00 +00:00
X86InstrInfo.h
X86InstrInfo.td Added field noResults to Instruction. 2005-12-26 09:11:45 +00:00
X86IntelAsmPrinter.cpp No longer track value types for asm printer operands, and remove them as 2005-11-30 18:54:35 +00:00
X86IntelAsmPrinter.h Fix a typo in my latest change 2005-11-30 18:57:39 +00:00
X86ISelDAGToDAG.cpp * Fix a GlobalAddress lowering bug. 2005-12-21 23:05:39 +00:00
X86ISelLowering.cpp Fix a problem duraid pointed out to me compiling kc++ with -enable-x86-fastcc 2005-12-27 03:02:18 +00:00
X86ISelLowering.h More X86 floating point patterns. 2005-12-23 07:31:11 +00:00
X86ISelPattern.cpp Rewrite FP stackifier support in the X86InstrInfo.td file, splitting patterns 2005-12-21 07:47:04 +00:00
X86JITInfo.cpp
X86JITInfo.h
X86PeepholeOpt.cpp remove some never-completed and now-obsolete code. 2005-12-12 20:12:20 +00:00
X86RegisterInfo.cpp Let the helper functions know about X86::FR32RegClass and X86::FR64RegClass. 2005-12-24 09:48:35 +00:00
X86RegisterInfo.h Pass extra regclasses into spilling code 2005-09-30 01:29:42 +00:00
X86RegisterInfo.td Bye bye HACKTROCITY. 2005-12-22 02:26:21 +00:00
X86Relocations.h
X86Subtarget.cpp Simplify the subtarget info, allow the asmwriter to do some target sensing 2005-11-21 22:43:58 +00:00
X86Subtarget.h Simplify the subtarget info, allow the asmwriter to do some target sensing 2005-11-21 22:43:58 +00:00
X86TargetMachine.cpp SSE2 floating point load / store patterns. SSE2 fp to int conversion patterns. 2005-12-20 22:59:51 +00:00
X86TargetMachine.h Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build. 2005-11-08 02:11:51 +00:00

//===---------------------------------------------------------------------===//
// Random ideas for the X86 backend.
//===---------------------------------------------------------------------===//

Add a MUL2U and MUL2S nodes to represent a multiply that returns both the
Hi and Lo parts (combination of MUL and MULH[SU] into one node).  Add this to
X86, & make the dag combiner produce it when needed.  This will eliminate one
imul from the code generated for:

long long test(long long X, long long Y) { return X*Y; }

by using the EAX result from the mul.  We should add a similar node for
DIVREM.

another case is:

long long test(int X, int Y) { return (long long)X*Y; }

... which should only be one imul instruction.

//===---------------------------------------------------------------------===//

This should be one DIV/IDIV instruction, not a libcall:

unsigned test(unsigned long long X, unsigned Y) {
        return X/Y;
}

This can be done trivially with a custom legalizer.  What about overflow 
though?  http://gcc.gnu.org/bugzilla/show_bug.cgi?id=14224

//===---------------------------------------------------------------------===//

Need to add support for rotate instructions.

//===---------------------------------------------------------------------===//

Some targets (e.g. athlons) prefer freep to fstp ST(0):
http://gcc.gnu.org/ml/gcc-patches/2004-04/msg00659.html

//===---------------------------------------------------------------------===//

This should use faddi on chips where it is profitable:
double foo(double P, int *I) { return P+*I; }

//===---------------------------------------------------------------------===//

The FP stackifier needs to be global.  Also, it should handle simple permutates
to reduce number of shuffle instructions, e.g. turning:

fld P	->		fld Q
fld Q			fld P
fxch

or:

fxch	->		fucomi
fucomi			jl X
jg X

//===---------------------------------------------------------------------===//

Improvements to the multiply -> shift/add algorithm:
http://gcc.gnu.org/ml/gcc-patches/2004-08/msg01590.html

//===---------------------------------------------------------------------===//

Improve code like this (occurs fairly frequently, e.g. in LLVM):
long long foo(int x) { return 1LL << x; }

http://gcc.gnu.org/ml/gcc-patches/2004-09/msg01109.html
http://gcc.gnu.org/ml/gcc-patches/2004-09/msg01128.html
http://gcc.gnu.org/ml/gcc-patches/2004-09/msg01136.html

Another useful one would be  ~0ULL >> X and ~0ULL << X.

//===---------------------------------------------------------------------===//

Should support emission of the bswap instruction, probably by adding a new
DAG node for byte swapping.  Also useful on PPC which has byte-swapping loads.

//===---------------------------------------------------------------------===//

Compile this:
_Bool f(_Bool a) { return a!=1; }

into:
        movzbl  %dil, %eax
        xorl    $1, %eax
        ret

//===---------------------------------------------------------------------===//

Some isel ideas:

1. Dynamic programming based approach when compile time if not an
   issue.
2. Code duplication (addressing mode) during isel.
3. Other ideas from "Register-Sensitive Selection, Duplication, and
   Sequencing of Instructions".

//===---------------------------------------------------------------------===//

Should we promote i16 to i32 to avoid partial register update stalls?

//===---------------------------------------------------------------------===//

Leave any_extend as pseudo instruction and hint to register
allocator. Delay codegen until post register allocation.