llvm-6502/lib/Target/Alpha
Chris Lattner 7c306da505 Sink InstructionSelect() out of each target into SDISel, and rename it
DoInstructionSelection.  Inline "SelectRoot" into it from DAGISelHeader.
Sink some other stuff out of DAGISelHeader into SDISel.

Eliminate the various 'Indent' stuff from various targets, which dates
to when isel was recursive.

 17 files changed, 114 insertions(+), 430 deletions(-)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97555 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 06:34:30 +00:00
..
AsmPrinter print all the newlines at the end of instructions with 2010-02-10 00:36:00 +00:00
TargetInfo
Alpha.h eliminate all the dead addSimpleCodeEmitter implementations. 2010-02-02 21:31:47 +00:00
Alpha.td
AlphaBranchSelector.cpp
AlphaCallingConv.td
AlphaCodeEmitter.cpp move target-independent opcodes out of TargetInstrInfo 2010-02-09 19:54:29 +00:00
AlphaInstrFormats.td
AlphaInstrInfo.cpp
AlphaInstrInfo.h
AlphaInstrInfo.td remove a bunch of dead named arguments in input patterns, 2010-02-23 06:54:29 +00:00
AlphaISelDAGToDAG.cpp Sink InstructionSelect() out of each target into SDISel, and rename it 2010-03-02 06:34:30 +00:00
AlphaISelLowering.cpp Move TLOF implementations to libCodegen to resolve layering violation. 2010-02-15 22:37:53 +00:00
AlphaISelLowering.h Revert 95130. 2010-02-02 23:55:14 +00:00
AlphaJITInfo.cpp
AlphaJITInfo.h
AlphaLLRP.cpp
AlphaMachineFunctionInfo.h
AlphaMCAsmInfo.cpp Eliminate SetDirective, and replace it with HasSetDirective. 2010-01-26 20:40:54 +00:00
AlphaMCAsmInfo.h
AlphaRegisterInfo.cpp Fix changes from r75027 2010-02-15 15:00:44 +00:00
AlphaRegisterInfo.h
AlphaRegisterInfo.td
AlphaRelocations.h
AlphaSchedule.td
AlphaSubtarget.cpp
AlphaSubtarget.h
AlphaTargetMachine.cpp eliminate all the dead addSimpleCodeEmitter implementations. 2010-02-02 21:31:47 +00:00
AlphaTargetMachine.h eliminate all the dead addSimpleCodeEmitter implementations. 2010-02-02 21:31:47 +00:00
CMakeLists.txt
Makefile
README.txt

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum accross bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extentions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html