mirror of
https://github.com/c64scene-ar/llvm-6502.git
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9903 91177308-0d34-0410-b5e6-96231b3b80d8
178 lines
6.2 KiB
C++
178 lines
6.2 KiB
C++
//===- InstrInfoEmitter.cpp - Generate a Instruction Set Desc. ------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This tablegen backend is responsible for emitting a description of the target
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// instruction set for the code generator.
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//
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//===----------------------------------------------------------------------===//
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#include "InstrInfoEmitter.h"
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#include "CodeGenWrappers.h"
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#include "Record.h"
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namespace llvm {
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// runEnums - Print out enum values for all of the instructions.
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void InstrInfoEmitter::runEnums(std::ostream &OS) {
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std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
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if (Insts.size() == 0)
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throw std::string("No 'Instruction' subclasses defined!");
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std::string Namespace = Insts[0]->getValueAsString("Namespace");
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EmitSourceFileHeader("Target Instruction Enum Values", OS);
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if (!Namespace.empty())
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OS << "namespace " << Namespace << " {\n";
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OS << " enum {\n";
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CodeGenTarget Target;
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// We must emit the PHI opcode first...
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Record *InstrInfo = Target.getInstructionSet();
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Record *PHI = InstrInfo->getValueAsDef("PHIInst");
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OS << " " << PHI->getName() << ", \t// 0 (fixed for all targets)\n";
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// Print out the rest of the instructions now...
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for (unsigned i = 0, e = Insts.size(); i != e; ++i)
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if (Insts[i] != PHI)
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OS << " " << Insts[i]->getName() << ", \t// " << i+1 << "\n";
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OS << " };\n";
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if (!Namespace.empty())
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OS << "}\n";
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EmitSourceFileTail(OS);
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}
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void InstrInfoEmitter::printDefList(ListInit *LI, const std::string &Name,
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std::ostream &OS) const {
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OS << "static const unsigned " << Name << "[] = { ";
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for (unsigned j = 0, e = LI->getSize(); j != e; ++j)
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if (DefInit *DI = dynamic_cast<DefInit*>(LI->getElement(j)))
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OS << getQualifiedName(DI->getDef()) << ", ";
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else
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throw "Illegal value in '" + Name + "' list!";
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OS << "0 };\n";
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}
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// run - Emit the main instruction description records for the target...
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void InstrInfoEmitter::run(std::ostream &OS) {
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EmitSourceFileHeader("Target Instruction Descriptors", OS);
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CodeGenTarget Target;
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const std::string &TargetName = Target.getName();
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Record *InstrInfo = Target.getInstructionSet();
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Record *PHI = InstrInfo->getValueAsDef("PHIInst");
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std::vector<Record*> Instructions =
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Records.getAllDerivedDefinitions("Instruction");
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// Emit empty implicit uses and defs lists
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OS << "static const unsigned EmptyImpUses[] = { 0 };\n"
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<< "static const unsigned EmptyImpDefs[] = { 0 };\n";
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// Emit all of the instruction's implicit uses and defs...
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for (unsigned i = 0, e = Instructions.size(); i != e; ++i) {
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Record *Inst = Instructions[i];
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ListInit *LI = Inst->getValueAsListInit("Uses");
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if (LI->getSize()) printDefList(LI, Inst->getName()+"ImpUses", OS);
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LI = Inst->getValueAsListInit("Defs");
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if (LI->getSize()) printDefList(LI, Inst->getName()+"ImpDefs", OS);
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}
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OS << "\nstatic const TargetInstrDescriptor " << TargetName
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<< "Insts[] = {\n";
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emitRecord(PHI, 0, InstrInfo, OS);
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for (unsigned i = 0, e = Instructions.size(); i != e; ++i)
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if (Instructions[i] != PHI)
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emitRecord(Instructions[i], i+1, InstrInfo, OS);
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OS << "};\n";
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EmitSourceFileTail(OS);
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}
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void InstrInfoEmitter::emitRecord(Record *R, unsigned Num, Record *InstrInfo,
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std::ostream &OS) {
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OS << " { \"" << R->getValueAsString("Name")
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<< "\",\t-1, -1, 0, false, 0, 0, 0, 0";
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// Emit all of the target indepedent flags...
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if (R->getValueAsBit("isReturn")) OS << "|M_RET_FLAG";
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if (R->getValueAsBit("isBranch")) OS << "|M_BRANCH_FLAG";
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if (R->getValueAsBit("isCall" )) OS << "|M_CALL_FLAG";
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if (R->getValueAsBit("isTwoAddress")) OS << "|M_2_ADDR_FLAG";
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if (R->getValueAsBit("isTerminator")) OS << "|M_TERMINATOR_FLAG";
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OS << ", 0";
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// Emit all of the target-specific flags...
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ListInit *LI = InstrInfo->getValueAsListInit("TSFlagsFields");
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ListInit *Shift = InstrInfo->getValueAsListInit("TSFlagsShifts");
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if (LI->getSize() != Shift->getSize())
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throw "Lengths of " + InstrInfo->getName() +
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":(TargetInfoFields, TargetInfoPositions) must be equal!";
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for (unsigned i = 0, e = LI->getSize(); i != e; ++i)
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emitShiftedValue(R, dynamic_cast<StringInit*>(LI->getElement(i)),
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dynamic_cast<IntInit*>(Shift->getElement(i)), OS);
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OS << ", ";
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// Emit the implicit uses and defs lists...
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LI = R->getValueAsListInit("Uses");
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if (!LI->getSize())
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OS << "EmptyImpUses, ";
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else
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OS << R->getName() << "ImpUses, ";
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LI = R->getValueAsListInit("Defs");
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if (!LI->getSize())
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OS << "EmptyImpDefs ";
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else
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OS << R->getName() << "ImpDefs ";
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OS << " }, // Inst #" << Num << " = " << R->getName() << "\n";
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}
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void InstrInfoEmitter::emitShiftedValue(Record *R, StringInit *Val,
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IntInit *ShiftInt, std::ostream &OS) {
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if (Val == 0 || ShiftInt == 0)
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throw std::string("Illegal value or shift amount in TargetInfo*!");
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RecordVal *RV = R->getValue(Val->getValue());
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int Shift = ShiftInt->getValue();
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if (RV == 0 || RV->getValue() == 0)
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throw R->getName() + " doesn't have a field named '" + Val->getValue()+"'!";
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Init *Value = RV->getValue();
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if (BitInit *BI = dynamic_cast<BitInit*>(Value)) {
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if (BI->getValue()) OS << "|(1<<" << Shift << ")";
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return;
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} else if (BitsInit *BI = dynamic_cast<BitsInit*>(Value)) {
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// Convert the Bits to an integer to print...
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Init *I = BI->convertInitializerTo(new IntRecTy());
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if (I)
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if (IntInit *II = dynamic_cast<IntInit*>(I)) {
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if (II->getValue())
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OS << "|(" << II->getValue() << "<<" << Shift << ")";
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return;
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}
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} else if (IntInit *II = dynamic_cast<IntInit*>(Value)) {
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if (II->getValue()) OS << "|(" << II->getValue() << "<<" << Shift << ")";
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return;
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}
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std::cerr << "Unhandled initializer: " << *Val << "\n";
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throw "In record '" + R->getName() + "' for TSFlag emission.";
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}
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} // End llvm namespace
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