llvm-6502/test/CodeGen
Akira Hatanaka 7e55ac7ce7 [ARM] In dynamic-no-pic mode, ARM's post-RA pseudo expansion was incorrectly
expanding pseudo LOAD_STATCK_GUARD using instructions that are normally used
in pic mode. This patch fixes the bug.

<rdar://problem/17886592>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214614 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-02 05:40:40 +00:00
..
AArch64 [FastISel][AArch64] Fold offset into the memory operation. 2014-08-01 19:40:16 +00:00
ARM [ARM] In dynamic-no-pic mode, ARM's post-RA pseudo expansion was incorrectly 2014-08-02 05:40:40 +00:00
CPP
Generic
Hexagon
Inputs
Mips llvm/test/CodeGen/Mips/cconv/arguments-varargs.ll: Add explicit -mtriple=(mips|mipsel)-linux on 4 lines. 2014-08-01 22:15:38 +00:00
MSP430
NVPTX
PowerPC [PowerPC] Recognize consecutive memory accesses from intrinsics 2014-08-01 01:02:01 +00:00
R600 R600: Cleanup fneg tests 2014-08-02 02:26:51 +00:00
SPARC
SystemZ
Thumb [ARM] In dynamic-no-pic mode, ARM's post-RA pseudo expansion was incorrectly 2014-08-02 05:40:40 +00:00
Thumb2 [ARM] In dynamic-no-pic mode, ARM's post-RA pseudo expansion was incorrectly 2014-08-02 05:40:40 +00:00
X86 [x86] Make some questionable tests not spew assembly to stdout, which 2014-08-02 00:50:10 +00:00
XCore