llvm-6502/lib/Target/Sparc
Duncan Sands 1440e8b918 Inside the calling convention logic LocVT is always a simple
value type, so there is no point in passing it around using
an EVT.  Use the simpler MVT everywhere.  Rather than trying
to propagate this information maximally in all the code that
using the calling convention stuff, I chose to do a mainly
low impact change instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118167 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03 11:35:31 +00:00
..
AsmPrinter
TargetInfo
CMakeLists.txt Removed a bunch of unnecessary target_link_libraries. 2010-09-28 22:39:14 +00:00
DelaySlotFiller.cpp Reapply r110396, with fixes to appease the Linux buildbot gods. 2010-08-06 18:33:48 +00:00
FPMover.cpp Reapply r110396, with fixes to appease the Linux buildbot gods. 2010-08-06 18:33:48 +00:00
Makefile
README.txt
Sparc.h
Sparc.td fix emacs language spec's, patch by Edmund Grimley-Evans! 2010-08-17 16:20:04 +00:00
SparcCallingConv.td
SparcInstrFormats.td
SparcInstrInfo.cpp Remove the isMoveInstr() hook. 2010-07-16 22:35:46 +00:00
SparcInstrInfo.h Remove the isMoveInstr() hook. 2010-07-16 22:35:46 +00:00
SparcInstrInfo.td Don't call Predicate_* methods directly from Sparc target. 2010-08-17 18:17:12 +00:00
SparcISelDAGToDAG.cpp fix a long standing wart: all the ComplexPattern's were being 2010-09-21 20:31:19 +00:00
SparcISelLowering.cpp Inside the calling convention logic LocVT is always a simple 2010-11-03 11:35:31 +00:00
SparcISelLowering.h
SparcMachineFunctionInfo.h
SparcMCAsmInfo.cpp Don't pass StringRef by reference. 2010-07-14 22:38:02 +00:00
SparcMCAsmInfo.h Don't pass StringRef by reference. 2010-07-14 22:38:02 +00:00
SparcRegisterInfo.cpp Simplify eliminateFrameIndex() interface back down now that PEI doesn't need 2010-08-26 23:32:16 +00:00
SparcRegisterInfo.h Simplify eliminateFrameIndex() interface back down now that PEI doesn't need 2010-08-26 23:32:16 +00:00
SparcRegisterInfo.td
SparcSelectionDAGInfo.cpp
SparcSelectionDAGInfo.h
SparcSubtarget.cpp
SparcSubtarget.h
SparcTargetMachine.cpp
SparcTargetMachine.h

To-do
-----

* Keep the address of the constant pool in a register instead of forming its
  address all of the time.
* We can fold small constant offsets into the %hi/%lo references to constant
  pool addresses as well.
* When in V9 mode, register allocate %icc[0-3].
* Add support for isel'ing UMUL_LOHI instead of marking it as Expand.
* Emit the 'Branch on Integer Register with Prediction' instructions.  It's
  not clear how to write a pattern for this though:

float %t1(int %a, int* %p) {
        %C = seteq int %a, 0
        br bool %C, label %T, label %F
T:
        store int 123, int* %p
        br label %F
F:
        ret float undef
}

codegens to this:

t1:
        save -96, %o6, %o6
1)      subcc %i0, 0, %l0
1)      bne .LBBt1_2    ! F
        nop
.LBBt1_1:       ! T
        or %g0, 123, %l0
        st %l0, [%i1]
.LBBt1_2:       ! F
        restore %g0, %g0, %g0
        retl
        nop

1) should be replaced with a brz in V9 mode.

* Same as above, but emit conditional move on register zero (p192) in V9 
  mode.  Testcase:

int %t1(int %a, int %b) {
        %C = seteq int %a, 0
        %D = select bool %C, int %a, int %b
        ret int %D
}

* Emit MULX/[SU]DIVX instructions in V9 mode instead of fiddling 
  with the Y register, if they are faster.

* Codegen bswap(load)/store(bswap) -> load/store ASI

* Implement frame pointer elimination, e.g. eliminate save/restore for 
  leaf fns.
* Fill delay slots

* Implement JIT support