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Major cleanup of whitespace and formatting issues in MBlaze backend git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118434 91177308-0d34-0410-b5e6-96231b3b80d8
172 lines
5.7 KiB
C++
172 lines
5.7 KiB
C++
//===-- DelaySlotFiller.cpp - MBlaze delay slot filler --------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// A pass that attempts to fill instructions with delay slots. If no
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// instructions can be moved into the delay slot then a NOP is placed there.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "delay-slot-filler"
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#include "MBlaze.h"
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#include "MBlazeTargetMachine.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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STATISTIC(FilledSlots, "Number of delay slots filled");
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namespace {
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struct Filler : public MachineFunctionPass {
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TargetMachine &TM;
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const TargetInstrInfo *TII;
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static char ID;
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Filler(TargetMachine &tm)
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: MachineFunctionPass(ID), TM(tm), TII(tm.getInstrInfo()) { }
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virtual const char *getPassName() const {
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return "MBlaze Delay Slot Filler";
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}
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bool runOnMachineBasicBlock(MachineBasicBlock &MBB);
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bool runOnMachineFunction(MachineFunction &F) {
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bool Changed = false;
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for (MachineFunction::iterator FI = F.begin(), FE = F.end();
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FI != FE; ++FI)
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Changed |= runOnMachineBasicBlock(*FI);
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return Changed;
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}
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};
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char Filler::ID = 0;
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} // end of anonymous namespace
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static bool hasImmInstruction(MachineBasicBlock::iterator &candidate) {
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// Any instruction with an immediate mode operand greater than
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// 16-bits requires an implicit IMM instruction.
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unsigned numOper = candidate->getNumOperands();
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for (unsigned op = 0; op < numOper; ++op) {
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if (candidate->getOperand(op).isImm() &&
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(candidate->getOperand(op).getImm() & 0xFFFFFFFFFFFF0000LL) != 0)
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return true;
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// FIXME: we could probably check to see if the FP value happens
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// to not need an IMM instruction. For now we just always
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// assume that FP values always do.
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if (candidate->getOperand(op).isFPImm())
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return true;
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}
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return false;
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}
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static bool delayHasHazard(MachineBasicBlock::iterator &candidate,
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MachineBasicBlock::iterator &slot) {
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// Loop over all of the operands in the branch instruction
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// and make sure that none of them are defined by the
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// candidate instruction.
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unsigned numOper = slot->getNumOperands();
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for (unsigned op = 0; op < numOper; ++op) {
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if (!slot->getOperand(op).isReg() ||
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!slot->getOperand(op).isUse() ||
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slot->getOperand(op).isImplicit())
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continue;
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unsigned cnumOper = candidate->getNumOperands();
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for (unsigned cop = 0; cop < cnumOper; ++cop) {
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if (candidate->getOperand(cop).isReg() &&
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candidate->getOperand(cop).isDef() &&
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candidate->getOperand(cop).getReg() ==
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slot->getOperand(op).getReg())
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return true;
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}
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}
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// There are no hazards between the two instructions
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return false;
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}
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static bool usedBeforeDelaySlot(MachineBasicBlock::iterator &candidate,
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MachineBasicBlock::iterator &slot) {
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MachineBasicBlock::iterator I = candidate;
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for (++I; I != slot; ++I) {
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unsigned numOper = I->getNumOperands();
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for (unsigned op = 0; op < numOper; ++op) {
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if (I->getOperand(op).isReg() &&
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I->getOperand(op).isUse()) {
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unsigned reg = I->getOperand(op).getReg();
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unsigned cops = candidate->getNumOperands();
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for (unsigned cop = 0; cop < cops; ++cop) {
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if (candidate->getOperand(cop).isReg() &&
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candidate->getOperand(cop).isDef() &&
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candidate->getOperand(cop).getReg() == reg)
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return true;
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}
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}
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}
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}
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return false;
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}
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static MachineBasicBlock::iterator
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findDelayInstr(MachineBasicBlock &MBB,MachineBasicBlock::iterator &slot) {
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MachineBasicBlock::iterator found = MBB.end();
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for (MachineBasicBlock::iterator I = MBB.begin(); I != slot; ++I) {
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TargetInstrDesc desc = I->getDesc();
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if (desc.hasDelaySlot() || desc.isBranch() ||
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desc.mayLoad() || desc. mayStore() ||
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hasImmInstruction(I) || delayHasHazard(I,slot) ||
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usedBeforeDelaySlot(I,slot)) continue;
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found = I;
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}
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return found;
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}
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/// runOnMachineBasicBlock - Fill in delay slots for the given basic block.
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/// Currently, we fill delay slots with NOPs. We assume there is only one
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/// delay slot per delayed instruction.
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bool Filler::runOnMachineBasicBlock(MachineBasicBlock &MBB) {
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bool Changed = false;
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for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); ++I)
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if (I->getDesc().hasDelaySlot()) {
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MachineBasicBlock::iterator J = I;
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MachineBasicBlock::iterator D = findDelayInstr(MBB,I);
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++J;
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++FilledSlots;
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Changed = true;
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if (D == MBB.end())
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BuildMI(MBB, J, I->getDebugLoc(), TII->get(MBlaze::NOP));
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else
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MBB.splice(J, &MBB, D);
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}
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return Changed;
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}
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/// createMBlazeDelaySlotFillerPass - Returns a pass that fills in delay
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/// slots in MBlaze MachineFunctions
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FunctionPass *llvm::createMBlazeDelaySlotFillerPass(MBlazeTargetMachine &tm) {
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return new Filler(tm);
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}
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