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https://github.com/c64scene-ar/llvm-6502.git
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7cb1b5f5bf
llc using the host cpu features and *waning* on unknown features is probably not a good thing :-( git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189144 91177308-0d34-0410-b5e6-96231b3b80d8
40 lines
1.6 KiB
LLVM
40 lines
1.6 KiB
LLVM
; RUN: llc < %s -march=x86-64 -mcpu=corei7 -mattr=+sse4.1 | FileCheck %s
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; rdar://12721174
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; We should not fold movss into pshufd since pshufd expects m128 while movss
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; loads from m32.
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define void @sample_test(<4 x float>* %source, <2 x float>* %dest) nounwind {
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; CHECK: sample_test
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; CHECK: movaps
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; CHECK: insertps
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entry:
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%source.addr = alloca <4 x float>*, align 8
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%dest.addr = alloca <2 x float>*, align 8
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%tmp = alloca <2 x float>, align 8
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store <4 x float>* %source, <4 x float>** %source.addr, align 8
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store <2 x float>* %dest, <2 x float>** %dest.addr, align 8
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store <2 x float> zeroinitializer, <2 x float>* %tmp, align 8
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%0 = load <4 x float>** %source.addr, align 8
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%arrayidx = getelementptr inbounds <4 x float>* %0, i64 0
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%1 = load <4 x float>* %arrayidx, align 16
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%2 = extractelement <4 x float> %1, i32 0
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%3 = load <2 x float>* %tmp, align 8
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%4 = insertelement <2 x float> %3, float %2, i32 1
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store <2 x float> %4, <2 x float>* %tmp, align 8
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%5 = load <2 x float>* %tmp, align 8
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%6 = load <2 x float>** %dest.addr, align 8
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%arrayidx1 = getelementptr inbounds <2 x float>* %6, i64 0
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store <2 x float> %5, <2 x float>* %arrayidx1, align 8
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%7 = load <2 x float>** %dest.addr, align 8
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%arrayidx2 = getelementptr inbounds <2 x float>* %7, i64 0
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%8 = load <2 x float>* %arrayidx2, align 8
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%vecext = extractelement <2 x float> %8, i32 0
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%9 = load <2 x float>** %dest.addr, align 8
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%arrayidx3 = getelementptr inbounds <2 x float>* %9, i64 0
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%10 = load <2 x float>* %arrayidx3, align 8
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%vecext4 = extractelement <2 x float> %10, i32 1
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call void @ext(float %vecext, float %vecext4)
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ret void
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}
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declare void @ext(float, float)
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