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llvm-6502/test/MC
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Matheus Almeida 6b3f3922bf [mips] Implement jr.hb and jalr.hb (Jump Register and Jump and Link Register with Hazard Barrier). 
Summary: These instructions are available in ISAs >= mips32/mips64. For mips32r6/mips64r6, jr.hb has a new encoding format.

Reviewers: dsanders

Reviewed By: dsanders

Differential Revision: http://reviews.llvm.org/D4019

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210654 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-11 15:05:56 +00:00
..
AArch64 Condition codes AL and NV are invalid in the aliases that use 2014-06-10 13:11:35 +00:00
ARM Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
AsmParser Rearrange the CHECK lines in this test to make failure more obvious. 2014-06-10 20:16:47 +00:00
COFF Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
Disassembler [mips] Implement jr.hb and jalr.hb (Jump Register and Jump and Link Register with Hazard Barrier). 2014-06-11 15:05:56 +00:00
ELF Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
MachO Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
Markup
Mips [mips] Implement jr.hb and jalr.hb (Jump Register and Jump and Link Register with Hazard Barrier). 2014-06-11 15:05:56 +00:00
PowerPC Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
Sparc Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
SystemZ Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
X86 [X86] AVX512: Add vmovntdqa 2014-06-10 16:39:53 +00:00