llvm-6502/lib/Target/MSP430
Ahmed Bougacha 7fac1d945f [SelectionDAG] Allow targets to specify legality of extloads' result
type (in addition to the memory type).

The *LoadExt* legalization handling used to only have one type, the
memory type.  This forced users to assume that as long as the extload
for the memory type was declared legal, and the result type was legal,
the whole extload was legal.

However, this isn't always the case.  For instance, on X86, with AVX,
this is legal:
    v4i32 load, zext from v4i8
but this isn't:
    v4i64 load, zext from v4i8
Whereas v4i64 is (arguably) legal, even without AVX2.

Note that the same thing was done a while ago for truncstores (r46140),
but I assume no one needed it yet for extloads, so here we go.

Calls to getLoadExtAction were changed to add the value type, found
manually in the surrounding code.

Calls to setLoadExtAction were mechanically changed, by wrapping the
call in a loop, to match previous behavior.  The loop iterates over
the MVT subrange corresponding to the memory type (FP vectors, etc...).
I also pulled neighboring setTruncStoreActions into some of the loops;
those shouldn't make a difference, as the additional types are illegal.
(e.g., i128->i1 truncstores on PPC.)

No functional change intended.

Differential Revision: http://reviews.llvm.org/D6532


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225421 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-08 00:51:32 +00:00
..
InstPrinter
MCTargetDesc
TargetInfo
CMakeLists.txt
LLVMBuild.txt
Makefile
MSP430.h
MSP430.td
MSP430AsmPrinter.cpp
MSP430BranchSelector.cpp
MSP430CallingConv.td
MSP430FrameLowering.cpp
MSP430FrameLowering.h
MSP430InstrFormats.td
MSP430InstrInfo.cpp
MSP430InstrInfo.h
MSP430InstrInfo.td Replace neverHasSideEffects=1 with hasSideEffects=0 in all .td files. 2014-11-26 00:46:26 +00:00
MSP430ISelDAGToDAG.cpp
MSP430ISelLowering.cpp [SelectionDAG] Allow targets to specify legality of extloads' result 2015-01-08 00:51:32 +00:00
MSP430ISelLowering.h
MSP430MachineFunctionInfo.cpp
MSP430MachineFunctionInfo.h
MSP430MCInstLower.cpp
MSP430MCInstLower.h
MSP430RegisterInfo.cpp
MSP430RegisterInfo.h
MSP430RegisterInfo.td
MSP430SelectionDAGInfo.cpp
MSP430SelectionDAGInfo.h
MSP430Subtarget.cpp
MSP430Subtarget.h
MSP430TargetMachine.cpp [CodeGen] Add print and verify pass after each MachineFunctionPass by default 2014-12-11 21:26:47 +00:00
MSP430TargetMachine.h Add out of line virtual destructors to all LLVMTargetMachine subclasses 2014-11-20 23:37:18 +00:00
README.txt

//===---------------------------------------------------------------------===//
// MSP430 backend.
//===---------------------------------------------------------------------===//

DISCLAIMER: Thid backend should be considered as highly experimental. I never
seen nor worked with this MCU, all information was gathered from datasheet
only. The original intention of making this backend was to write documentation
of form "How to write backend for dummies" :) Thes notes hopefully will be
available pretty soon.

Some things are incomplete / not implemented yet (this list surely is not
complete as well):

1. Verify, how stuff is handling implicit zext with 8 bit operands (this might
be modelled currently in improper way - should we need to mark the superreg as
def for every 8 bit instruction?).

2. Libcalls: multiplication, division, remainder. Note, that calling convention
for libcalls is incomptible with calling convention of libcalls of msp430-gcc
(these cannot be used though due to license restriction).

3. Implement multiplication / division by constant (dag combiner hook?).

4. Implement non-constant shifts.

5. Implement varargs stuff.

6. Verify and fix (if needed) how's stuff playing with i32 / i64.

7. Implement floating point stuff (softfp?)

8. Implement instruction encoding for (possible) direct code emission in the
future.

9. Since almost all instructions set flags - implement brcond / select in better
way (currently they emit explicit comparison).

10. Handle imm in comparisons in better way (see comment in MSP430InstrInfo.td)

11. Implement hooks for better memory op folding, etc.