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https://github.com/c64scene-ar/llvm-6502.git
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3299448769
Fix an off-by-one access introduced in 224502 for push.w and pop.w with single register operands. Add test cases for both scenarios. Thanks to Asiri Rathnayake for pointing out the failure! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224521 91177308-0d34-0410-b5e6-96231b3b80d8
95 lines
2.3 KiB
ArmAsm
95 lines
2.3 KiB
ArmAsm
@ RUN: not llvm-mc -triple thumbv7-eabi -filetype asm -o - %s 2>&1 \
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@ RUN: | FileCheck %s
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.syntax unified
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.thumb
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.global ldm
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.type ldm,%function
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ldb:
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ldm r0!, {r1, sp}
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@ CHECK: error: SP may not be in the register list
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@ CHECK: ldm r0!, {r1, sp}
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@ CHECK: ^
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ldm r0!, {lr, pc}
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@ CHECK: error: PC and LR may not be in the register list simultaneously
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@ CHECK: ldm r0!, {lr, pc}
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@ CHECK: ^
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itt eq
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ldmeq r0!, {r1, pc}
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ldmeq r0!, {r2, lr}
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@ CHECK: error: instruction must be outside of IT block or the last instruction in an IT block
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@ CHECK: ldmeq r0!, {r1, pc}
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@ CHECK: ^
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.global ldmdb
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.type ldmdb,%function
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ldmdb:
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ldmdb r0!, {r1, sp}
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@ CHECK: error: SP may not be in the register list
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ldm r0!, {lr, pc}
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@ error: PC and LR may not be in the register list simultaneously
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itt eq
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ldmeq r0!, {r1, pc}
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ldmeq r0!, {r2, lr}
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@ CHECK: error: instruction must be outside of IT block or the last instruction in an IT block
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@ CHECK: ldmeq r0!, {r1, pc}
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@ CHECK: ^
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.global stm
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.type stm,%function
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stm:
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stm r0!, {r1, sp}
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@ CHECK: error: SP may not be in the register list
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stm r0!, {r2, pc}
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@ CHECK: error: PC may not be in the register list
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stm r0!, {sp, pc}
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@ CHECK: error: SP and PC may not be in the register list
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.global stmdb
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.type stmdb,%function
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stmdb:
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stmdb r0!, {r1, sp}
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@ CHECK: error: SP may not be in the register list
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stmdb r0!, {r2, pc}
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@ CHECK: error: PC may not be in the register list
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stmdb r0!, {sp, pc}
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@ CHECK: error: SP and PC may not be in the register list
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.global push
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.type push,%function
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push:
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push {sp}
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@ CHECK: error: SP may not be in the register list
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push {pc}
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@ CHECK: error: PC may not be in the register list
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push {sp,pc}
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@ CHECK: error: SP and PC may not be in the register list
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.global pop
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.type pop,%function
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pop:
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pop {lr, pc}
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@ CHECK: error: PC and LR may not be in the register list simultaneously
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@ CHECK: pop {lr, pc}
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@ CHECK: ^
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itt eq
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popeq {r1, pc}
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popeq {r2, lr}
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@ CHECK: error: instruction must be outside of IT block or the last instruction in an IT block
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@ CHECK: popeq {r1, pc}
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@ CHECK: ^
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.global valid
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.type valid,%function
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valid:
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pop {sp}
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@ CHECK: ldr sp, [sp], #4
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pop {sp, pc}
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@ CHECK: pop.w {sp, pc}
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push.w {r0}
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@ CHECK: str r0, [sp, #-4]
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pop.w {r0}
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@ CHECK: ldr r0, [sp], #4
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