llvm-6502/test/MC
Adam Nemet 7fc69597b7 [X86] AVX512: Specify compressed displacement for vmovntdqa
Use the max 64-bit element size with EVEX_CD8.  This should work since element
size is ignored for a full-vector access (FVM).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211175 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-18 16:51:07 +00:00
..
AArch64 Condition codes AL and NV are invalid in the aliases that use 2014-06-10 13:11:35 +00:00
ARM Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
AsmParser Rearrange the CHECK lines in this test to make failure more obvious. 2014-06-10 20:16:47 +00:00
COFF Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
Disassembler [mips][mips64r6] Add BLTC and BLTUC instructions 2014-06-18 14:36:00 +00:00
ELF Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
MachO Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
Markup
Mips [mips] Fix expansion of memory operation if destination register is not a GPR. 2014-06-18 14:49:56 +00:00
PowerPC Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
Sparc Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
SystemZ Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
X86 [X86] AVX512: Specify compressed displacement for vmovntdqa 2014-06-18 16:51:07 +00:00