llvm-6502/test/CodeGen/X86/mul-legalize.ll
Chris Lattner d1980a5acd Move 3 "(add (select cc, 0, c), x) -> (select cc, x, (add, x, c))"
related transformations out of target-specific dag combine into the
ARM backend.  These were added by Evan in r37685 with no testcases
and only seems to help ARM (e.g. test/CodeGen/ARM/select_xform.ll).

Add some simple X86-specific (for now) DAG combines that turn things
like cond ? 8 : 0  -> (zext(cond) << 3).  This happens frequently
with the recently added cp constant select optimization, but is a
very general xform.  For example, we now compile the second example
in const-select.ll to:

_test:
        movsd   LCPI2_0, %xmm0
        ucomisd 8(%esp), %xmm0
        seta    %al
        movzbl  %al, %eax
        movl    4(%esp), %ecx
        movsbl  (%ecx,%eax,4), %eax
        ret

instead of:

_test:
        movl    4(%esp), %eax
        leal    4(%eax), %ecx
        movsd   LCPI2_0, %xmm0
        ucomisd 8(%esp), %xmm0
        cmovbe  %eax, %ecx
        movsbl  (%ecx), %eax
        ret

This passes multisource and dejagnu.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66779 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-12 06:52:53 +00:00

25 lines
684 B
LLVM

; RUN: llvm-as < %s | llc -march=x86 | grep 24576
; PR2135
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
target triple = "i386-pc-linux-gnu"
@.str = constant [13 x i8] c"c45531m.adb\00\00"
define void @main() nounwind {
entry:
%tmp1 = call i1 @report__equal( i32 3, i32 3 )
%b.0 = select i1 %tmp1, i64 35184372088832, i64 0
%tmp7 = mul i64 3, %b.0
%tmp32 = icmp eq i64 %tmp7, 105553116266496
br i1 %tmp32, label %return, label %bb35
bb35:
call void @abort( )
unreachable
return:
ret void
}
declare i1 @report__equal(i32 %x, i32 %y) nounwind;
declare void @abort()