Saleem Abdulrasool 8009754517 ARM IAS: support emitting constant values in target expressions ... A 32-bit immediate value can be formed from a constant expression and loaded into a register. Add support to emit this into an object file. Because this value is a constant, a relocation must *not* be produced for it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199023 91177308-0d34-0410-b5e6-96231b3b80d8		2014-01-11 23:03:48 +00:00
..
Analysis	Fixed old typo in ScalarEvolution, that caused wrong SCEVs zext operation.	2014-01-09 12:26:12 +00:00
AsmParser	Move the LLVM IR asm writer header files into the IR directory, as they	2014-01-07 12:34:26 +00:00
Bitcode
CodeGen	Fix 'ned' typo in doc comment	2014-01-11 14:01:43 +00:00
DebugInfo	llvm-dwarfdump: type unit dwo support	2014-01-09 05:08:24 +00:00
ExecutionEngine	Re-apply r196639: Add support for archives and object file caching under MCJIT.	2014-01-08 04:09:09 +00:00
IR	[PM] Add names to passes under the new pass manager, and a debug output	2014-01-11 11:52:05 +00:00
IRReader	Move the LLVM IR asm writer header files into the IR directory, as they	2014-01-07 12:34:26 +00:00
Linker
LTO	LTO: whitespace changes	2014-01-10 20:24:35 +00:00
MC	Revert "Revert r198851, "Prototype of skeleton type units for fission""	2014-01-10 01:38:41 +00:00
Object
Option
Support	Use the simpler version of sys::fs::remove when possible.	2014-01-10 21:40:29 +00:00
TableGen
Target	ARM IAS: support emitting constant values in target expressions	2014-01-11 23:03:48 +00:00
Transforms	LoopVectorizer: Enable strided memory accesses versioning per default	2014-01-11 20:40:34 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile