Matt Arsenault 2220408e1a Support REG_SEQUENCE in tablegen. ... The problem is mostly that variadic output instruction aren't handled, so it is rejected for having an inconsistent number of operands, and then the right number of operands isn't emitted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221117 91177308-0d34-0410-b5e6-96231b3b80d8		2014-11-02 23:46:51 +00:00
..
CostTable.h	Add a overload to CostTable which allows it to infer the size of the table.	2013-08-09 19:33:32 +00:00
Target.td	Support REG_SEQUENCE in tablegen.	2014-11-02 23:46:51 +00:00
TargetCallingConv.h	ARM: HFAs must be passed in consecutive registers	2014-05-09 14:01:47 +00:00
TargetCallingConv.td	[tablegen] Add CustomCallingConv and use it to tablegen-erate the outermost parts of the Mips O32 implementation	2014-11-01 17:38:22 +00:00
TargetFrameLowering.h	Re-apply r211399, "Generate native unwind info on Win64" with a fix to ignore SEH pseudo ops in X86 JIT emitter.	2014-06-25 12:41:52 +00:00
TargetInstrInfo.h	[AAarch64] Optimize CSINC-branch sequence	2014-10-14 23:07:53 +00:00
TargetIntrinsicInfo.h	Trailing whitespace.	2014-07-23 00:42:52 +00:00
TargetItinerary.td	I'm introducing a new machine model to simultaneously allow simple	2012-07-07 04:00:00 +00:00
TargetLibraryInfo.h	PR21145: Teach LLVM about C++14 sized deallocation functions.	2014-10-03 20:17:06 +00:00
TargetLowering.h	[CodeGenPrepare] Move extractelement close to store if they can be combined.	2014-10-31 17:52:53 +00:00
TargetLoweringObjectFile.h	CodeGen: Stick constant pool entries in COMDAT sections for WinCOFF	2014-07-14 22:57:27 +00:00
TargetMachine.h	Target: Fix build breakage.	2014-09-26 02:57:05 +00:00
TargetOpcodes.h	[stack protector] Fix a potential security bug in stack protector where the	2014-07-25 19:31:34 +00:00
TargetOptions.h	Satiate the sanitizer build bot	2014-08-21 20:09:15 +00:00
TargetRegisterInfo.h	Revert 202433 - Provide a target override for the latest regalloc heuristic	2014-10-03 12:20:53 +00:00
TargetSchedule.td	Move Post RA Scheduling flag bit into SchedMachineModel	2014-07-15 22:39:58 +00:00
TargetSelectionDAG.td	Add minnum / maxnum intrinsics	2014-10-21 23:00:20 +00:00
TargetSelectionDAGInfo.h	Trailing whitespace.	2014-07-23 00:42:52 +00:00
TargetSubtargetInfo.h	[PBQP] Replace PBQPBuilder with composable constraints (PBQPRAConstraint).	2014-10-09 18:20:51 +00:00