mirror of
https://github.com/c64scene-ar/llvm-6502.git
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cf57c7084a
backend to not use exceptions at all except in cases of actual error. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95762 91177308-0d34-0410-b5e6-96231b3b80d8
666 lines
20 KiB
C++
666 lines
20 KiB
C++
//===- EDEmitter.cpp - Generate instruction descriptions for ED -*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This tablegen backend is responsible for emitting a description of each
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// instruction in a format that the enhanced disassembler can use to tokenize
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// and parse instructions.
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//
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//===----------------------------------------------------------------------===//
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#include "EDEmitter.h"
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#include "AsmWriterInst.h"
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#include "CodeGenTarget.h"
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#include "Record.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/Format.h"
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#include "llvm/Support/raw_ostream.h"
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#include <vector>
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#include <string>
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#define MAX_OPERANDS 5
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#define MAX_SYNTAXES 2
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using namespace llvm;
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///////////////////////////////////////////////////////////
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// Support classes for emitting nested C data structures //
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///////////////////////////////////////////////////////////
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namespace {
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class EnumEmitter {
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private:
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std::string Name;
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std::vector<std::string> Entries;
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public:
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EnumEmitter(const char *N) : Name(N) {
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}
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int addEntry(const char *e) {
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Entries.push_back(std::string(e));
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return Entries.size() - 1;
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}
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void emit(raw_ostream &o, unsigned int &i) {
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o.indent(i) << "enum " << Name.c_str() << " {" << "\n";
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i += 2;
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unsigned int index = 0;
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unsigned int numEntries = Entries.size();
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for(index = 0; index < numEntries; ++index) {
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o.indent(i) << Entries[index];
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if(index < (numEntries - 1))
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o << ",";
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o << "\n";
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}
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i -= 2;
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o.indent(i) << "};" << "\n";
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}
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void emitAsFlags(raw_ostream &o, unsigned int &i) {
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o.indent(i) << "enum " << Name.c_str() << " {" << "\n";
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i += 2;
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unsigned int index = 0;
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unsigned int numEntries = Entries.size();
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unsigned int flag = 1;
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for (index = 0; index < numEntries; ++index) {
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o.indent(i) << Entries[index] << " = " << format("0x%x", flag);
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if (index < (numEntries - 1))
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o << ",";
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o << "\n";
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flag <<= 1;
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}
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i -= 2;
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o.indent(i) << "};" << "\n";
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}
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};
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class StructEmitter {
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private:
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std::string Name;
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std::vector<std::string> MemberTypes;
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std::vector<std::string> MemberNames;
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public:
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StructEmitter(const char *N) : Name(N) {
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}
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void addMember(const char *t, const char *n) {
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MemberTypes.push_back(std::string(t));
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MemberNames.push_back(std::string(n));
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}
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void emit(raw_ostream &o, unsigned int &i) {
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o.indent(i) << "struct " << Name.c_str() << " {" << "\n";
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i += 2;
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unsigned int index = 0;
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unsigned int numMembers = MemberTypes.size();
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for (index = 0; index < numMembers; ++index) {
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o.indent(i) << MemberTypes[index] << " " << MemberNames[index] << ";";
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o << "\n";
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}
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i -= 2;
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o.indent(i) << "};" << "\n";
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}
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};
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class ConstantEmitter {
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public:
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virtual ~ConstantEmitter() { }
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virtual void emit(raw_ostream &o, unsigned int &i) = 0;
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};
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class LiteralConstantEmitter : public ConstantEmitter {
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private:
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std::string Literal;
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public:
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LiteralConstantEmitter(const char *literal) : Literal(literal) {
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}
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LiteralConstantEmitter(int literal) {
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char buf[256];
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snprintf(buf, 256, "%d", literal);
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Literal = buf;
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}
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void emit(raw_ostream &o, unsigned int &i) {
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o << Literal;
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}
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};
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class CompoundConstantEmitter : public ConstantEmitter {
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private:
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std::vector<ConstantEmitter*> Entries;
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public:
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CompoundConstantEmitter() {
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}
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~CompoundConstantEmitter() {
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unsigned int index;
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unsigned int numEntries = Entries.size();
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for (index = 0; index < numEntries; ++index) {
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delete Entries[index];
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}
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}
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CompoundConstantEmitter &addEntry(ConstantEmitter *e) {
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Entries.push_back(e);
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return *this;
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}
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void emit(raw_ostream &o, unsigned int &i) {
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o << "{" << "\n";
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i += 2;
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unsigned int index;
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unsigned int numEntries = Entries.size();
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for (index = 0; index < numEntries; ++index) {
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o.indent(i);
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Entries[index]->emit(o, i);
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if (index < (numEntries - 1))
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o << ",";
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o << "\n";
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}
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i -= 2;
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o.indent(i) << "}";
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}
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};
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class FlagsConstantEmitter : public ConstantEmitter {
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private:
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std::vector<std::string> Flags;
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public:
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FlagsConstantEmitter() {
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}
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FlagsConstantEmitter &addEntry(const char *f) {
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Flags.push_back(std::string(f));
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return *this;
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}
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void emit(raw_ostream &o, unsigned int &i) {
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unsigned int index;
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unsigned int numFlags = Flags.size();
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if (numFlags == 0)
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o << "0";
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for (index = 0; index < numFlags; ++index) {
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o << Flags[index].c_str();
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if (index < (numFlags - 1))
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o << " | ";
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}
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}
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};
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}
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EDEmitter::EDEmitter(RecordKeeper &R) : Records(R) {
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}
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/// populateOperandOrder - Accepts a CodeGenInstruction and generates its
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/// AsmWriterInst for the desired assembly syntax, giving an ordered list of
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/// operands in the order they appear in the printed instruction. Then, for
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/// each entry in that list, determines the index of the same operand in the
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/// CodeGenInstruction, and emits the resulting mapping into an array, filling
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/// in unused slots with -1.
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///
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/// @arg operandOrder - The array that will be populated with the operand
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/// mapping. Each entry will contain -1 (invalid index
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/// into the operands present in the AsmString) or a number
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/// representing an index in the operand descriptor array.
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/// @arg inst - The instruction to use when looking up the operands
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/// @arg syntax - The syntax to use, according to LLVM's enumeration
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void populateOperandOrder(CompoundConstantEmitter *operandOrder,
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const CodeGenInstruction &inst,
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unsigned syntax) {
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unsigned int numArgs = 0;
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AsmWriterInst awInst(inst, syntax, -1, -1);
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std::vector<AsmWriterOperand>::iterator operandIterator;
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for (operandIterator = awInst.Operands.begin();
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operandIterator != awInst.Operands.end();
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++operandIterator) {
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if (operandIterator->OperandType ==
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AsmWriterOperand::isMachineInstrOperand) {
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char buf[2];
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snprintf(buf, sizeof(buf), "%u", operandIterator->CGIOpNo);
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operandOrder->addEntry(new LiteralConstantEmitter(buf));
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numArgs++;
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}
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}
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for(; numArgs < MAX_OPERANDS; numArgs++) {
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operandOrder->addEntry(new LiteralConstantEmitter("-1"));
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}
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}
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/////////////////////////////////////////////////////
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// Support functions for handling X86 instructions //
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/////////////////////////////////////////////////////
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#define ADDFLAG(flag) flags->addEntry(flag)
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#define REG(str) if (name == str) { ADDFLAG("kOperandFlagRegister"); return 0; }
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#define MEM(str) if (name == str) { ADDFLAG("kOperandFlagMemory"); return 0; }
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#define LEA(str) if (name == str) { ADDFLAG("kOperandFlagEffectiveAddress"); \
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return 0; }
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#define IMM(str) if (name == str) { ADDFLAG("kOperandFlagImmediate"); \
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return 0; }
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#define PCR(str) if (name == str) { ADDFLAG("kOperandFlagMemory"); \
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ADDFLAG("kOperandFlagPCRelative"); \
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return 0; }
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/// X86FlagFromOpName - Processes the name of a single X86 operand (which is
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/// actually its type) and translates it into an operand flag
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///
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/// @arg flags - The flags object to add the flag to
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/// @arg name - The name of the operand
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static int X86FlagFromOpName(FlagsConstantEmitter *flags,
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const std::string &name) {
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REG("GR8");
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REG("GR8_NOREX");
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REG("GR16");
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REG("GR32");
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REG("GR32_NOREX");
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REG("FR32");
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REG("RFP32");
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REG("GR64");
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REG("FR64");
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REG("VR64");
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REG("RFP64");
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REG("RFP80");
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REG("VR128");
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REG("RST");
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REG("SEGMENT_REG");
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REG("DEBUG_REG");
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REG("CONTROL_REG_32");
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REG("CONTROL_REG_64");
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MEM("i8mem");
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MEM("i8mem_NOREX");
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MEM("i16mem");
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MEM("i32mem");
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MEM("f32mem");
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MEM("ssmem");
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MEM("opaque32mem");
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MEM("opaque48mem");
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MEM("i64mem");
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MEM("f64mem");
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MEM("sdmem");
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MEM("f80mem");
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MEM("opaque80mem");
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MEM("i128mem");
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MEM("f128mem");
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MEM("opaque512mem");
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LEA("lea32mem");
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LEA("lea64_32mem");
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LEA("lea64mem");
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IMM("i8imm");
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IMM("i16imm");
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IMM("i16i8imm");
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IMM("i32imm");
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IMM("i32imm_pcrel");
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IMM("i32i8imm");
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IMM("i64imm");
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IMM("i64i8imm");
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IMM("i64i32imm");
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IMM("i64i32imm_pcrel");
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IMM("SSECC");
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PCR("brtarget8");
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PCR("offset8");
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PCR("offset16");
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PCR("offset32");
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PCR("offset64");
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PCR("brtarget");
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return 1;
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}
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#undef REG
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#undef MEM
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#undef LEA
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#undef IMM
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#undef PCR
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#undef ADDFLAG
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/// X86PopulateOperands - Handles all the operands in an X86 instruction, adding
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/// the appropriate flags to their descriptors
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///
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/// @operandFlags - A reference the array of operand flag objects
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/// @inst - The instruction to use as a source of information
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static void X86PopulateOperands(
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FlagsConstantEmitter *(&operandFlags)[MAX_OPERANDS],
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const CodeGenInstruction &inst) {
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if (!inst.TheDef->isSubClassOf("X86Inst"))
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return;
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unsigned int index;
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unsigned int numOperands = inst.OperandList.size();
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for (index = 0; index < numOperands; ++index) {
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const CodeGenInstruction::OperandInfo &operandInfo =
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inst.OperandList[index];
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Record &rec = *operandInfo.Rec;
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if (X86FlagFromOpName(operandFlags[index], rec.getName())) {
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errs() << "Operand type: " << rec.getName().c_str() << "\n";
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errs() << "Operand name: " << operandInfo.Name.c_str() << "\n";
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errs() << "Instruction mame: " << inst.TheDef->getName().c_str() << "\n";
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llvm_unreachable("Unhandled type");
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}
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}
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}
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/// decorate1 - Decorates a named operand with a new flag
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///
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/// @operandFlags - The array of operand flag objects, which don't have names
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/// @inst - The CodeGenInstruction, which provides a way to translate
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/// between names and operand indices
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/// @opName - The name of the operand
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/// @flag - The name of the flag to add
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static inline void decorate1(FlagsConstantEmitter *(&operandFlags)[MAX_OPERANDS],
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const CodeGenInstruction &inst,
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const char *opName,
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const char *opFlag) {
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unsigned opIndex;
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opIndex = inst.getOperandNamed(std::string(opName));
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operandFlags[opIndex]->addEntry(opFlag);
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}
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#define DECORATE1(opName, opFlag) decorate1(operandFlags, inst, opName, opFlag)
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#define MOV(source, target) { \
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instFlags.addEntry("kInstructionFlagMove"); \
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DECORATE1(source, "kOperandFlagSource"); \
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DECORATE1(target, "kOperandFlagTarget"); \
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}
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#define BRANCH(target) { \
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instFlags.addEntry("kInstructionFlagBranch"); \
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DECORATE1(target, "kOperandFlagTarget"); \
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}
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#define PUSH(source) { \
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instFlags.addEntry("kInstructionFlagPush"); \
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DECORATE1(source, "kOperandFlagSource"); \
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}
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#define POP(target) { \
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instFlags.addEntry("kInstructionFlagPop"); \
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DECORATE1(target, "kOperandFlagTarget"); \
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}
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#define CALL(target) { \
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instFlags.addEntry("kInstructionFlagCall"); \
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DECORATE1(target, "kOperandFlagTarget"); \
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}
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#define RETURN() { \
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instFlags.addEntry("kInstructionFlagReturn"); \
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}
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/// X86ExtractSemantics - Performs various checks on the name of an X86
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/// instruction to determine what sort of an instruction it is and then adds
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/// the appropriate flags to the instruction and its operands
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///
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/// @arg instFlags - A reference to the flags for the instruction as a whole
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/// @arg operandFlags - A reference to the array of operand flag object pointers
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/// @arg inst - A reference to the original instruction
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static void X86ExtractSemantics(FlagsConstantEmitter &instFlags,
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FlagsConstantEmitter *(&operandFlags)[MAX_OPERANDS],
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const CodeGenInstruction &inst) {
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const std::string &name = inst.TheDef->getName();
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if (name.find("MOV") != name.npos) {
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if (name.find("MOV_V") != name.npos) {
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// ignore (this is a pseudoinstruction)
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}
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else if (name.find("MASK") != name.npos) {
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// ignore (this is a masking move)
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}
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else if (name.find("r0") != name.npos) {
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// ignore (this is a pseudoinstruction)
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}
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else if (name.find("PS") != name.npos ||
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name.find("PD") != name.npos) {
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// ignore (this is a shuffling move)
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}
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else if (name.find("MOVS") != name.npos) {
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// ignore (this is a string move)
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}
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else if (name.find("_F") != name.npos) {
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// TODO handle _F moves to ST(0)
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}
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else if (name.find("a") != name.npos) {
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// TODO handle moves to/from %ax
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}
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else if (name.find("CMOV") != name.npos) {
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MOV("src2", "dst");
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}
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else if (name.find("PC") != name.npos) {
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MOV("label", "reg")
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}
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else {
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MOV("src", "dst");
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}
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}
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if (name.find("JMP") != name.npos ||
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name.find("J") == 0) {
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if (name.find("FAR") != name.npos && name.find("i") != name.npos) {
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BRANCH("off");
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}
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else {
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BRANCH("dst");
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}
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}
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if (name.find("PUSH") != name.npos) {
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if (name.find("FS") != name.npos ||
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name.find("GS") != name.npos) {
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instFlags.addEntry("kInstructionFlagPush");
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// TODO add support for fixed operands
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}
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else if (name.find("F") != name.npos) {
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// ignore (this pushes onto the FP stack)
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}
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else if (name[name.length() - 1] == 'm') {
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PUSH("src");
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}
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else if (name.find("i") != name.npos) {
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PUSH("imm");
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}
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else {
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PUSH("reg");
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}
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}
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if (name.find("POP") != name.npos) {
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if (name.find("POPCNT") != name.npos) {
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// ignore (not a real pop)
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}
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else if (name.find("FS") != name.npos ||
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name.find("GS") != name.npos) {
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instFlags.addEntry("kInstructionFlagPop");
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// TODO add support for fixed operands
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}
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else if (name.find("F") != name.npos) {
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// ignore (this pops from the FP stack)
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}
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else if (name[name.length() - 1] == 'm') {
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POP("dst");
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}
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else {
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POP("reg");
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}
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}
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if (name.find("CALL") != name.npos) {
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if (name.find("ADJ") != name.npos) {
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// ignore (not a call)
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}
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else if (name.find("SYSCALL") != name.npos) {
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// ignore (doesn't go anywhere we know about)
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}
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else if (name.find("VMCALL") != name.npos) {
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// ignore (rather different semantics than a regular call)
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}
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else if (name.find("FAR") != name.npos && name.find("i") != name.npos) {
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CALL("off");
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}
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else {
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CALL("dst");
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}
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}
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if (name.find("RET") != name.npos) {
|
|
RETURN();
|
|
}
|
|
}
|
|
|
|
#undef MOV
|
|
#undef BRANCH
|
|
#undef PUSH
|
|
#undef POP
|
|
#undef CALL
|
|
#undef RETURN
|
|
|
|
#undef COND_DECORATE_2
|
|
#undef COND_DECORATE_1
|
|
#undef DECORATE1
|
|
|
|
/// populateInstInfo - Fills an array of InstInfos with information about each
|
|
/// instruction in a target
|
|
///
|
|
/// @arg infoArray - The array of InstInfo objects to populate
|
|
/// @arg target - The CodeGenTarget to use as a source of instructions
|
|
static void populateInstInfo(CompoundConstantEmitter &infoArray,
|
|
CodeGenTarget &target) {
|
|
std::vector<const CodeGenInstruction*> numberedInstructions;
|
|
target.getInstructionsByEnumValue(numberedInstructions);
|
|
|
|
unsigned int index;
|
|
unsigned int numInstructions = numberedInstructions.size();
|
|
|
|
for (index = 0; index < numInstructions; ++index) {
|
|
const CodeGenInstruction& inst = *numberedInstructions[index];
|
|
|
|
CompoundConstantEmitter *infoStruct = new CompoundConstantEmitter;
|
|
infoArray.addEntry(infoStruct);
|
|
|
|
FlagsConstantEmitter *instFlags = new FlagsConstantEmitter;
|
|
infoStruct->addEntry(instFlags);
|
|
|
|
LiteralConstantEmitter *numOperandsEmitter =
|
|
new LiteralConstantEmitter(inst.OperandList.size());
|
|
infoStruct->addEntry(numOperandsEmitter);
|
|
|
|
CompoundConstantEmitter *operandFlagArray = new CompoundConstantEmitter;
|
|
infoStruct->addEntry(operandFlagArray);
|
|
|
|
FlagsConstantEmitter *operandFlags[MAX_OPERANDS];
|
|
|
|
for (unsigned operandIndex = 0; operandIndex < MAX_OPERANDS; ++operandIndex) {
|
|
operandFlags[operandIndex] = new FlagsConstantEmitter;
|
|
operandFlagArray->addEntry(operandFlags[operandIndex]);
|
|
}
|
|
|
|
unsigned numSyntaxes = 0;
|
|
|
|
if (target.getName() == "X86") {
|
|
X86PopulateOperands(operandFlags, inst);
|
|
X86ExtractSemantics(*instFlags, operandFlags, inst);
|
|
numSyntaxes = 2;
|
|
}
|
|
|
|
CompoundConstantEmitter *operandOrderArray = new CompoundConstantEmitter;
|
|
infoStruct->addEntry(operandOrderArray);
|
|
|
|
for (unsigned syntaxIndex = 0; syntaxIndex < MAX_SYNTAXES; ++syntaxIndex) {
|
|
CompoundConstantEmitter *operandOrder = new CompoundConstantEmitter;
|
|
operandOrderArray->addEntry(operandOrder);
|
|
|
|
if (syntaxIndex < numSyntaxes) {
|
|
populateOperandOrder(operandOrder, inst, syntaxIndex);
|
|
}
|
|
else {
|
|
for (unsigned operandIndex = 0;
|
|
operandIndex < MAX_OPERANDS;
|
|
++operandIndex) {
|
|
operandOrder->addEntry(new LiteralConstantEmitter("-1"));
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
void EDEmitter::run(raw_ostream &o) {
|
|
unsigned int i = 0;
|
|
|
|
CompoundConstantEmitter infoArray;
|
|
CodeGenTarget target;
|
|
|
|
populateInstInfo(infoArray, target);
|
|
|
|
o << "InstInfo instInfo" << target.getName().c_str() << "[] = ";
|
|
infoArray.emit(o, i);
|
|
o << ";" << "\n";
|
|
}
|
|
|
|
void EDEmitter::runHeader(raw_ostream &o) {
|
|
EmitSourceFileHeader("Enhanced Disassembly Info Header", o);
|
|
|
|
o << "#ifndef EDInfo_" << "\n";
|
|
o << "#define EDInfo_" << "\n";
|
|
o << "\n";
|
|
o << "#include <inttypes.h>" << "\n";
|
|
o << "\n";
|
|
o << "#define MAX_OPERANDS " << format("%d", MAX_OPERANDS) << "\n";
|
|
o << "#define MAX_SYNTAXES " << format("%d", MAX_SYNTAXES) << "\n";
|
|
o << "\n";
|
|
|
|
unsigned int i = 0;
|
|
|
|
EnumEmitter operandFlags("OperandFlags");
|
|
operandFlags.addEntry("kOperandFlagImmediate");
|
|
operandFlags.addEntry("kOperandFlagRegister");
|
|
operandFlags.addEntry("kOperandFlagMemory");
|
|
operandFlags.addEntry("kOperandFlagEffectiveAddress");
|
|
operandFlags.addEntry("kOperandFlagPCRelative");
|
|
operandFlags.addEntry("kOperandFlagSource");
|
|
operandFlags.addEntry("kOperandFlagTarget");
|
|
operandFlags.emitAsFlags(o, i);
|
|
|
|
o << "\n";
|
|
|
|
EnumEmitter instructionFlags("InstructionFlags");
|
|
instructionFlags.addEntry("kInstructionFlagMove");
|
|
instructionFlags.addEntry("kInstructionFlagBranch");
|
|
instructionFlags.addEntry("kInstructionFlagPush");
|
|
instructionFlags.addEntry("kInstructionFlagPop");
|
|
instructionFlags.addEntry("kInstructionFlagCall");
|
|
instructionFlags.addEntry("kInstructionFlagReturn");
|
|
instructionFlags.emitAsFlags(o, i);
|
|
|
|
o << "\n";
|
|
|
|
StructEmitter instInfo("InstInfo");
|
|
instInfo.addMember("uint32_t", "instructionFlags");
|
|
instInfo.addMember("uint8_t", "numOperands");
|
|
instInfo.addMember("uint8_t", "operandFlags[MAX_OPERANDS]");
|
|
instInfo.addMember("const char", "operandOrders[MAX_SYNTAXES][MAX_OPERANDS]");
|
|
instInfo.emit(o, i);
|
|
|
|
o << "\n";
|
|
o << "#endif" << "\n";
|
|
}
|