Reid Kleckner 805a83c041 Allow sret on the second parameter as well as the first ... MSVC always places the implicit sret parameter after the implicit this parameter of instance methods. We used to handle this for x86_thiscallcc by allocating the sret parameter on the stack and leaving the this pointer in ecx, but that doesn't handle alternative calling conventions like cdecl, stdcall, fastcall, or the win64 convention. Instead, change the verifier to allow sret on the second parameter. This also requires changing the Mips and X86 backends to return the argument with the sret parameter, instead of assuming that the sret parameter comes first. The Sparc backend also returns sret parameters in a register, but I wasn't able to update it to handle secondary sret parameters. It currently calls report_fatal_error if you feed it an sret in the second parameter. Reviewers: rafael.espindola, majnemer Differential Revision: http://reviews.llvm.org/D3617 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208453 91177308-0d34-0410-b5e6-96231b3b80d8		2014-05-09 22:32:13 +00:00
..
ADT	Missed formatting	2014-05-08 21:53:33 +00:00
Analysis	split delinearization pass in 3 steps	2014-05-07 18:01:20 +00:00
AsmParser
Bitcode
CodeGen	ARM: HFAs must be passed in consecutive registers	2014-05-09 14:01:47 +00:00
Config
DebugInfo
ExecutionEngine	Fix MSVC build broken by r207580	2014-04-29 22:04:55 +00:00
IR	Allow sret on the second parameter as well as the first	2014-05-09 22:32:13 +00:00
IRReader
LineEditor
Linker
LTO	Rename member variable to try to fix the bots.	2014-05-03 15:28:13 +00:00
MC	Move late partial-unrolling thresholds into the processor definitions	2014-05-08 09:14:44 +00:00
Object	Add range access to ELFFile's sections collection.	2014-05-05 06:48:34 +00:00
Option	Add missing include, found by modules build.	2014-04-24 23:29:25 +00:00
ProfileData
Support	llvm-cov: Fix some funny indentation (NFC)	2014-05-07 21:50:43 +00:00
TableGen	[tablegen] Add !listconcat operator with the similar semantics as !strconcat	2014-05-07 10:13:19 +00:00
Target	ARM: HFAs must be passed in consecutive registers	2014-05-09 14:01:47 +00:00
Transforms	[modules] Add missing #include.	2014-05-08 02:34:32 +00:00
CMakeLists.txt
InitializePasses.h	Add an optimization that does CSE in a group of similar GEPs.	2014-05-01 18:38:36 +00:00
LinkAllIR.h
LinkAllPasses.h	Add an optimization that does CSE in a group of similar GEPs.	2014-05-01 18:38:36 +00:00
Pass.h
PassAnalysisSupport.h
PassManager.h
PassRegistry.h
PassSupport.h