mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-15 20:29:48 +00:00
8eaed0f63d
This matches the format produced by the AMD proprietary driver. //==================================================================// // Shell script for converting .ll test cases: (Pass the .ll files you want to convert to this script as arguments). //==================================================================// ; This was necessary on my system so that A-Z in sed would match only ; upper case. I'm not sure why. export LC_ALL='C' TEST_FILES="$*" MATCHES=`grep -v Patterns SIInstructions.td | grep -o '"[A-Z0-9_]\+["e]' | grep -o '[A-Z0-9_]\+' | sort -r` for f in $TEST_FILES; do # Check that there are SI tests: grep -q -e 'verde' -e 'bonaire' -e 'SI' -e 'tahiti' $f if [ $? -eq 0 ]; then for match in $MATCHES; do sed -i -e "s/\([ :]$match\)/\L\1/" $f done # Try to get check lines with partial instruction names sed -i 's/\(;[ ]*SI[A-Z\\-]*: \)\([A-Z_0-9]\+\)/\1\L\2/' $f fi done sed -i -e 's/bb0_1/BB0_1/g' ../../../test/CodeGen/R600/infinite-loop.ll sed -i -e 's/SI-NOT: bfe/SI-NOT: {{[^@]}}bfe/g'../../../test/CodeGen/R600/llvm.AMDGPU.bfe.*32.ll ../../../test/CodeGen/R600/sext-in-reg.ll sed -i -e 's/exp_IEEE/EXP_IEEE/g' ../../../test/CodeGen/R600/llvm.exp2.ll sed -i -e 's/numVgprs/NumVgprs/g' ../../../test/CodeGen/R600/register-count-comments.ll sed -i 's/\(; CHECK[-NOT]*: \)\([A-Z_0-9]\+\)/\1\L\2/' ../../../test/CodeGen/R600/select64.ll ../../../test/CodeGen/R600/sgpr-copy.ll //==================================================================// // Shell script for converting .td files (run this last) //==================================================================// export LC_ALL='C' sed -i -e '/Patterns/!s/\("[A-Z0-9_]\+[ "e]\)/\L\1/g' SIInstructions.td sed -i -e 's/"EXP/"exp/g' SIInstrInfo.td git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221350 91177308-0d34-0410-b5e6-96231b3b80d8
55 lines
2.2 KiB
LLVM
55 lines
2.2 KiB
LLVM
; RUN: llc < %s -march=r600 --mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK
|
|
; RUN: llc < %s -march=r600 --mcpu=SI -verify-machineinstrs| FileCheck %s --check-prefix=SI-CHECK
|
|
|
|
; R600-CHECK-LABEL: {{^}}sqrt_f32:
|
|
; R600-CHECK: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[2].Z
|
|
; R600-CHECK: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[2].Z, PS
|
|
; SI-CHECK-LABEL: {{^}}sqrt_f32:
|
|
; SI-CHECK: v_sqrt_f32_e32
|
|
define void @sqrt_f32(float addrspace(1)* %out, float %in) {
|
|
entry:
|
|
%0 = call float @llvm.sqrt.f32(float %in)
|
|
store float %0, float addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
; R600-CHECK-LABEL: {{^}}sqrt_v2f32:
|
|
; R600-CHECK-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[2].W
|
|
; R600-CHECK-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[2].W, PS
|
|
; R600-CHECK-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].X
|
|
; R600-CHECK-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].X, PS
|
|
; SI-CHECK-LABEL: {{^}}sqrt_v2f32:
|
|
; SI-CHECK: v_sqrt_f32_e32
|
|
; SI-CHECK: v_sqrt_f32_e32
|
|
define void @sqrt_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %in) {
|
|
entry:
|
|
%0 = call <2 x float> @llvm.sqrt.v2f32(<2 x float> %in)
|
|
store <2 x float> %0, <2 x float> addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
; R600-CHECK-LABEL: {{^}}sqrt_v4f32:
|
|
; R600-CHECK-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].Y
|
|
; R600-CHECK-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].Y, PS
|
|
; R600-CHECK-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].Z
|
|
; R600-CHECK-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].Z, PS
|
|
; R600-CHECK-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].W
|
|
; R600-CHECK-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].W, PS
|
|
; R600-CHECK-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[4].X
|
|
; R600-CHECK-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[4].X, PS
|
|
; SI-CHECK-LABEL: {{^}}sqrt_v4f32:
|
|
; SI-CHECK: v_sqrt_f32_e32
|
|
; SI-CHECK: v_sqrt_f32_e32
|
|
; SI-CHECK: v_sqrt_f32_e32
|
|
; SI-CHECK: v_sqrt_f32_e32
|
|
define void @sqrt_v4f32(<4 x float> addrspace(1)* %out, <4 x float> %in) {
|
|
entry:
|
|
%0 = call <4 x float> @llvm.sqrt.v4f32(<4 x float> %in)
|
|
store <4 x float> %0, <4 x float> addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
declare float @llvm.sqrt.f32(float %in)
|
|
declare <2 x float> @llvm.sqrt.v2f32(<2 x float> %in)
|
|
declare <4 x float> @llvm.sqrt.v4f32(<4 x float> %in)
|