Jim Grosbach 6ccfc507dc Many Thumb2 instructions can reference the full ARM register set (i.e., ... have 4 bits per register in the operand encoding), but have undefined behavior when the operand value is 13 or 15 (SP and PC, respectively). The trivial coalescer in linear scan sometimes will merge a copy from SP into a subsequent instruction which uses the copy, and if that instruction cannot legally reference SP, we get bad code such as: mls r0,r9,r0,sp instead of: mov r2, sp mls r0, r9, r0, r2 This patch adds a new register class for use by Thumb2 that excludes the problematic registers (SP and PC) and is used instead of GPR for those operands which cannot legally reference PC or SP. The trivial coalescer explicitly requires that the register class of the destination for the COPY instruction contain the source register for the COPY to be considered for coalescing. This prevents errant instructions like that above. PR7499 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109842 91177308-0d34-0410-b5e6-96231b3b80d8		2010-07-30 02:41:01 +00:00
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Analysis	Speculatively revert r109705 since it seems to be causing some build bot	2010-07-29 01:25:38 +00:00
Archive
AsmParser	Define a maximum supported alignment value for load, store, and	2010-07-28 20:12:04 +00:00
Bitcode	Make NamedMDNode not be a subclass of Value, and simplify the interface	2010-07-21 23:38:33 +00:00
CodeGen	Plug the remaining MC leaks by giving MCObjectStreamer/MCAsmStreamer ownership of the TargetAsmBackend and the MCCodeEmitter.	2010-07-29 17:48:06 +00:00
CompilerDriver	Fix silent failure with no input files.	2010-07-27 11:19:40 +00:00
ExecutionEngine	Don't call __register_frame from the JIT on systems that use setjmp/longjmp	2010-07-26 21:58:00 +00:00
Linker	Make NamedMDNode not be a subclass of Value, and simplify the interface	2010-07-21 23:38:33 +00:00
MC	Plug the remaining MC leaks by giving MCObjectStreamer/MCAsmStreamer ownership of the TargetAsmBackend and the MCCodeEmitter.	2010-07-29 17:48:06 +00:00
Support	CrashRecovery: Use ThreadLocal::erase() instead of set(0).	2010-07-29 15:24:21 +00:00
System	Add an erase() method to llvm::ThreadLocal.	2010-07-28 22:49:43 +00:00
Target	Many Thumb2 instructions can reference the full ARM register set (i.e.,	2010-07-30 02:41:01 +00:00
Transforms	PR7750: !CExpr->isNullValue() only properly computes whether CExpr is nonnull	2010-07-29 18:03:33 +00:00
VMCore	Make GlobalValue alignment consistent with load, store, and alloca	2010-07-28 20:56:48 +00:00
Makefile