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https://github.com/c64scene-ar/llvm-6502.git
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8950dd127a
The assembler currently strictly verifies that immediates for s16imm operands are in range (-32768 ... 32767). This matches the behaviour of the GNU assembler, with one exception: gas allows, as a special case, operands in an extended range (-65536 .. 65535) for the addis instruction only (and its extended mnemonic lis). The main reason for this seems to be to allow using unsigned 16-bit operands for lis, e.g. like lis %r1, 0xfedc. Since this has been supported by gas for a long time, and assembler source code seen "in the wild" actually exploits this feature, this patch adds equivalent support to LLVM for compatibility reasons. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184946 91177308-0d34-0410-b5e6-96231b3b80d8
89 lines
2.1 KiB
ArmAsm
89 lines
2.1 KiB
ArmAsm
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# RUN: not llvm-mc -triple powerpc64-unknown-unknown < %s 2> %t
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# RUN: FileCheck < %t %s
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# Register operands
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# CHECK: error: invalid operand for instruction
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# CHECK-NEXT: add 32, 32, 32
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add 32, 32, 32
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# CHECK: error: invalid register name
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# CHECK-NEXT: add %r32, %r32, %r32
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add %r32, %r32, %r32
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# Signed 16-bit immediate operands
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# CHECK: error: invalid operand for instruction
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# CHECK-NEXT: addi 1, 0, -32769
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addi 1, 0, -32769
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# CHECK: error: invalid operand for instruction
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# CHECK-NEXT: addi 1, 0, 32768
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addi 1, 0, 32768
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# Unsigned 16-bit immediate operands
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# CHECK: error: invalid operand for instruction
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# CHECK-NEXT: ori 1, 2, -1
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ori 1, 2, -1
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# CHECK: error: invalid operand for instruction
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# CHECK-NEXT: ori 1, 2, 65536
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ori 1, 2, 65536
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# Signed 16-bit immediate operands (extended range for addis)
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# CHECK: error: invalid operand for instruction
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addis 1, 0, -65537
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# CHECK: error: invalid operand for instruction
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addis 1, 0, 65536
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# D-Form memory operands
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# CHECK: error: invalid register number
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# CHECK-NEXT: lwz 1, 0(32)
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lwz 1, 0(32)
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# CHECK: error: invalid register name
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# CHECK-NEXT: lwz 1, 0(%r32)
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lwz 1, 0(%r32)
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# CHECK: error: invalid operand for instruction
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# CHECK-NEXT: lwz 1, -32769(2)
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lwz 1, -32769(2)
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# CHECK: error: invalid operand for instruction
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# CHECK-NEXT: lwz 1, 32768(2)
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lwz 1, 32768(2)
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# CHECK: error: invalid register number
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# CHECK-NEXT: ld 1, 0(32)
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ld 1, 0(32)
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# CHECK: error: invalid register name
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# CHECK-NEXT: ld 1, 0(%r32)
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ld 1, 0(%r32)
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# CHECK: error: invalid operand for instruction
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# CHECK-NEXT: ld 1, 1(2)
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ld 1, 1(2)
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# CHECK: error: invalid operand for instruction
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# CHECK-NEXT: ld 1, 2(2)
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ld 1, 2(2)
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# CHECK: error: invalid operand for instruction
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# CHECK-NEXT: ld 1, 3(2)
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ld 1, 3(2)
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# CHECK: error: invalid operand for instruction
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# CHECK-NEXT: ld 1, -32772(2)
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ld 1, -32772(2)
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# CHECK: error: invalid operand for instruction
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# CHECK-NEXT: ld 1, 32768(2)
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ld 1, 32768(2)
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