mirror of
https://github.com/c64scene-ar/llvm-6502.git
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80ffc965f5
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94105 91177308-0d34-0410-b5e6-96231b3b80d8
355 lines
14 KiB
C++
355 lines
14 KiB
C++
//===-- FunctionLoweringInfo.cpp ------------------------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This implements routines for translating functions from LLVM IR into
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// Machine IR.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "function-lowering-info"
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#include "FunctionLoweringInfo.h"
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#include "llvm/CallingConv.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/Function.h"
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#include "llvm/Instructions.h"
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#include "llvm/IntrinsicInst.h"
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#include "llvm/LLVMContext.h"
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#include "llvm/Module.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/Analysis/DebugInfo.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include "llvm/Target/TargetData.h"
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#include "llvm/Target/TargetFrameInfo.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetIntrinsicInfo.h"
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#include "llvm/Target/TargetLowering.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/MathExtras.h"
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#include "llvm/Support/raw_ostream.h"
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#include <algorithm>
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using namespace llvm;
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/// ComputeLinearIndex - Given an LLVM IR aggregate type and a sequence
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/// of insertvalue or extractvalue indices that identify a member, return
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/// the linearized index of the start of the member.
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///
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unsigned llvm::ComputeLinearIndex(const TargetLowering &TLI, const Type *Ty,
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const unsigned *Indices,
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const unsigned *IndicesEnd,
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unsigned CurIndex) {
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// Base case: We're done.
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if (Indices && Indices == IndicesEnd)
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return CurIndex;
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// Given a struct type, recursively traverse the elements.
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if (const StructType *STy = dyn_cast<StructType>(Ty)) {
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for (StructType::element_iterator EB = STy->element_begin(),
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EI = EB,
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EE = STy->element_end();
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EI != EE; ++EI) {
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if (Indices && *Indices == unsigned(EI - EB))
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return ComputeLinearIndex(TLI, *EI, Indices+1, IndicesEnd, CurIndex);
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CurIndex = ComputeLinearIndex(TLI, *EI, 0, 0, CurIndex);
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}
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return CurIndex;
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}
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// Given an array type, recursively traverse the elements.
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else if (const ArrayType *ATy = dyn_cast<ArrayType>(Ty)) {
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const Type *EltTy = ATy->getElementType();
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for (unsigned i = 0, e = ATy->getNumElements(); i != e; ++i) {
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if (Indices && *Indices == i)
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return ComputeLinearIndex(TLI, EltTy, Indices+1, IndicesEnd, CurIndex);
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CurIndex = ComputeLinearIndex(TLI, EltTy, 0, 0, CurIndex);
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}
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return CurIndex;
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}
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// We haven't found the type we're looking for, so keep searching.
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return CurIndex + 1;
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}
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/// ComputeValueVTs - Given an LLVM IR type, compute a sequence of
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/// EVTs that represent all the individual underlying
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/// non-aggregate types that comprise it.
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///
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/// If Offsets is non-null, it points to a vector to be filled in
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/// with the in-memory offsets of each of the individual values.
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///
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void llvm::ComputeValueVTs(const TargetLowering &TLI, const Type *Ty,
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SmallVectorImpl<EVT> &ValueVTs,
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SmallVectorImpl<uint64_t> *Offsets,
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uint64_t StartingOffset) {
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// Given a struct type, recursively traverse the elements.
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if (const StructType *STy = dyn_cast<StructType>(Ty)) {
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const StructLayout *SL = TLI.getTargetData()->getStructLayout(STy);
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for (StructType::element_iterator EB = STy->element_begin(),
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EI = EB,
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EE = STy->element_end();
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EI != EE; ++EI)
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ComputeValueVTs(TLI, *EI, ValueVTs, Offsets,
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StartingOffset + SL->getElementOffset(EI - EB));
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return;
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}
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// Given an array type, recursively traverse the elements.
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if (const ArrayType *ATy = dyn_cast<ArrayType>(Ty)) {
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const Type *EltTy = ATy->getElementType();
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uint64_t EltSize = TLI.getTargetData()->getTypeAllocSize(EltTy);
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for (unsigned i = 0, e = ATy->getNumElements(); i != e; ++i)
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ComputeValueVTs(TLI, EltTy, ValueVTs, Offsets,
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StartingOffset + i * EltSize);
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return;
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}
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// Interpret void as zero return values.
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if (Ty->isVoidTy())
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return;
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// Base case: we can get an EVT for this LLVM IR type.
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ValueVTs.push_back(TLI.getValueType(Ty));
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if (Offsets)
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Offsets->push_back(StartingOffset);
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}
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/// isUsedOutsideOfDefiningBlock - Return true if this instruction is used by
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/// PHI nodes or outside of the basic block that defines it, or used by a
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/// switch or atomic instruction, which may expand to multiple basic blocks.
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static bool isUsedOutsideOfDefiningBlock(Instruction *I) {
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if (isa<PHINode>(I)) return true;
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BasicBlock *BB = I->getParent();
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for (Value::use_iterator UI = I->use_begin(), E = I->use_end(); UI != E; ++UI)
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if (cast<Instruction>(*UI)->getParent() != BB || isa<PHINode>(*UI))
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return true;
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return false;
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}
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/// isOnlyUsedInEntryBlock - If the specified argument is only used in the
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/// entry block, return true. This includes arguments used by switches, since
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/// the switch may expand into multiple basic blocks.
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static bool isOnlyUsedInEntryBlock(Argument *A, bool EnableFastISel) {
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// With FastISel active, we may be splitting blocks, so force creation
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// of virtual registers for all non-dead arguments.
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// Don't force virtual registers for byval arguments though, because
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// fast-isel can't handle those in all cases.
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if (EnableFastISel && !A->hasByValAttr())
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return A->use_empty();
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BasicBlock *Entry = A->getParent()->begin();
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for (Value::use_iterator UI = A->use_begin(), E = A->use_end(); UI != E; ++UI)
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if (cast<Instruction>(*UI)->getParent() != Entry || isa<SwitchInst>(*UI))
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return false; // Use not in entry block.
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return true;
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}
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FunctionLoweringInfo::FunctionLoweringInfo(TargetLowering &tli)
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: TLI(tli) {
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}
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void FunctionLoweringInfo::set(Function &fn, MachineFunction &mf,
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bool EnableFastISel) {
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Fn = &fn;
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MF = &mf;
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RegInfo = &MF->getRegInfo();
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// Create a vreg for each argument register that is not dead and is used
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// outside of the entry block for the function.
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for (Function::arg_iterator AI = Fn->arg_begin(), E = Fn->arg_end();
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AI != E; ++AI)
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if (!isOnlyUsedInEntryBlock(AI, EnableFastISel))
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InitializeRegForValue(AI);
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// Initialize the mapping of values to registers. This is only set up for
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// instruction values that are used outside of the block that defines
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// them.
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Function::iterator BB = Fn->begin(), EB = Fn->end();
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for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I)
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if (AllocaInst *AI = dyn_cast<AllocaInst>(I))
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if (ConstantInt *CUI = dyn_cast<ConstantInt>(AI->getArraySize())) {
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const Type *Ty = AI->getAllocatedType();
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uint64_t TySize = TLI.getTargetData()->getTypeAllocSize(Ty);
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unsigned Align =
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std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty),
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AI->getAlignment());
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TySize *= CUI->getZExtValue(); // Get total allocated size.
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if (TySize == 0) TySize = 1; // Don't create zero-sized stack objects.
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StaticAllocaMap[AI] =
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MF->getFrameInfo()->CreateStackObject(TySize, Align, false);
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}
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for (; BB != EB; ++BB)
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for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I)
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if (!I->use_empty() && isUsedOutsideOfDefiningBlock(I))
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if (!isa<AllocaInst>(I) ||
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!StaticAllocaMap.count(cast<AllocaInst>(I)))
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InitializeRegForValue(I);
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// Create an initial MachineBasicBlock for each LLVM BasicBlock in F. This
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// also creates the initial PHI MachineInstrs, though none of the input
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// operands are populated.
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for (BB = Fn->begin(), EB = Fn->end(); BB != EB; ++BB) {
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MachineBasicBlock *MBB = mf.CreateMachineBasicBlock(BB);
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MBBMap[BB] = MBB;
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MF->push_back(MBB);
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// Transfer the address-taken flag. This is necessary because there could
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// be multiple MachineBasicBlocks corresponding to one BasicBlock, and only
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// the first one should be marked.
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if (BB->hasAddressTaken())
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MBB->setHasAddressTaken();
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// Create Machine PHI nodes for LLVM PHI nodes, lowering them as
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// appropriate.
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PHINode *PN;
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DebugLoc DL;
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for (BasicBlock::iterator
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I = BB->begin(), E = BB->end(); I != E; ++I) {
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PN = dyn_cast<PHINode>(I);
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if (!PN || PN->use_empty()) continue;
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unsigned PHIReg = ValueMap[PN];
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assert(PHIReg && "PHI node does not have an assigned virtual register!");
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SmallVector<EVT, 4> ValueVTs;
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ComputeValueVTs(TLI, PN->getType(), ValueVTs);
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for (unsigned vti = 0, vte = ValueVTs.size(); vti != vte; ++vti) {
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EVT VT = ValueVTs[vti];
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unsigned NumRegisters = TLI.getNumRegisters(Fn->getContext(), VT);
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const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
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for (unsigned i = 0; i != NumRegisters; ++i)
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BuildMI(MBB, DL, TII->get(TargetInstrInfo::PHI), PHIReg + i);
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PHIReg += NumRegisters;
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}
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}
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}
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}
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/// clear - Clear out all the function-specific state. This returns this
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/// FunctionLoweringInfo to an empty state, ready to be used for a
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/// different function.
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void FunctionLoweringInfo::clear() {
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MBBMap.clear();
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ValueMap.clear();
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StaticAllocaMap.clear();
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#ifndef NDEBUG
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CatchInfoLost.clear();
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CatchInfoFound.clear();
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#endif
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LiveOutRegInfo.clear();
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}
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unsigned FunctionLoweringInfo::MakeReg(EVT VT) {
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return RegInfo->createVirtualRegister(TLI.getRegClassFor(VT));
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}
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/// CreateRegForValue - Allocate the appropriate number of virtual registers of
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/// the correctly promoted or expanded types. Assign these registers
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/// consecutive vreg numbers and return the first assigned number.
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///
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/// In the case that the given value has struct or array type, this function
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/// will assign registers for each member or element.
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///
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unsigned FunctionLoweringInfo::CreateRegForValue(const Value *V) {
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SmallVector<EVT, 4> ValueVTs;
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ComputeValueVTs(TLI, V->getType(), ValueVTs);
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unsigned FirstReg = 0;
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for (unsigned Value = 0, e = ValueVTs.size(); Value != e; ++Value) {
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EVT ValueVT = ValueVTs[Value];
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EVT RegisterVT = TLI.getRegisterType(V->getContext(), ValueVT);
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unsigned NumRegs = TLI.getNumRegisters(V->getContext(), ValueVT);
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for (unsigned i = 0; i != NumRegs; ++i) {
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unsigned R = MakeReg(RegisterVT);
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if (!FirstReg) FirstReg = R;
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}
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}
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return FirstReg;
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}
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/// ExtractTypeInfo - Returns the type info, possibly bitcast, encoded in V.
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GlobalVariable *llvm::ExtractTypeInfo(Value *V) {
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V = V->stripPointerCasts();
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GlobalVariable *GV = dyn_cast<GlobalVariable>(V);
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assert ((GV || isa<ConstantPointerNull>(V)) &&
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"TypeInfo must be a global variable or NULL");
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return GV;
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}
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/// AddCatchInfo - Extract the personality and type infos from an eh.selector
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/// call, and add them to the specified machine basic block.
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void llvm::AddCatchInfo(CallInst &I, MachineModuleInfo *MMI,
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MachineBasicBlock *MBB) {
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// Inform the MachineModuleInfo of the personality for this landing pad.
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ConstantExpr *CE = cast<ConstantExpr>(I.getOperand(2));
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assert(CE->getOpcode() == Instruction::BitCast &&
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isa<Function>(CE->getOperand(0)) &&
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"Personality should be a function");
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MMI->addPersonality(MBB, cast<Function>(CE->getOperand(0)));
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// Gather all the type infos for this landing pad and pass them along to
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// MachineModuleInfo.
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std::vector<GlobalVariable *> TyInfo;
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unsigned N = I.getNumOperands();
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for (unsigned i = N - 1; i > 2; --i) {
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if (ConstantInt *CI = dyn_cast<ConstantInt>(I.getOperand(i))) {
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unsigned FilterLength = CI->getZExtValue();
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unsigned FirstCatch = i + FilterLength + !FilterLength;
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assert (FirstCatch <= N && "Invalid filter length");
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if (FirstCatch < N) {
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TyInfo.reserve(N - FirstCatch);
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for (unsigned j = FirstCatch; j < N; ++j)
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TyInfo.push_back(ExtractTypeInfo(I.getOperand(j)));
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MMI->addCatchTypeInfo(MBB, TyInfo);
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TyInfo.clear();
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}
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if (!FilterLength) {
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// Cleanup.
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MMI->addCleanup(MBB);
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} else {
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// Filter.
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TyInfo.reserve(FilterLength - 1);
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for (unsigned j = i + 1; j < FirstCatch; ++j)
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TyInfo.push_back(ExtractTypeInfo(I.getOperand(j)));
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MMI->addFilterTypeInfo(MBB, TyInfo);
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TyInfo.clear();
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}
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N = i;
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}
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}
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if (N > 3) {
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TyInfo.reserve(N - 3);
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for (unsigned j = 3; j < N; ++j)
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TyInfo.push_back(ExtractTypeInfo(I.getOperand(j)));
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MMI->addCatchTypeInfo(MBB, TyInfo);
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}
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}
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void llvm::CopyCatchInfo(BasicBlock *SrcBB, BasicBlock *DestBB,
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MachineModuleInfo *MMI, FunctionLoweringInfo &FLI) {
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for (BasicBlock::iterator I = SrcBB->begin(), E = --SrcBB->end(); I != E; ++I)
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if (EHSelectorInst *EHSel = dyn_cast<EHSelectorInst>(I)) {
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// Apply the catch info to DestBB.
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AddCatchInfo(*EHSel, MMI, FLI.MBBMap[DestBB]);
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#ifndef NDEBUG
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if (!FLI.MBBMap[SrcBB]->isLandingPad())
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FLI.CatchInfoFound.insert(EHSel);
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#endif
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}
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}
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