llvm-6502/test/CodeGen
2010-05-22 00:10:22 +00:00
..
Alpha
ARM Change CodeGen/ARM/2009-11-02-NegativeLane.ll to use 16-bit vector elements 2010-05-21 21:05:32 +00:00
Blackfin
CBackend
CellSPU Make SPU backend not assert on jump tables. 2010-05-11 11:00:02 +00:00
CPP
Generic Enable a bunch more -regalloc=fast tests 2010-05-12 00:11:24 +00:00
MBlaze
Mips
MSP430 Insert ANY_EXTEND node instead of invalid truncate during DAG Combining (X & 1), 2010-05-01 12:52:34 +00:00
PIC16
PowerPC Only use clairvoyance when defining a register, and then only if it has one use. 2010-05-17 04:50:57 +00:00
SPARC
SystemZ SystemZ really does mean "has calls" and not just "adjusts stack." Go ahead and 2010-05-14 22:17:42 +00:00
Thumb Enable a bunch more -regalloc=fast tests 2010-05-12 00:11:24 +00:00
Thumb2 t2LEApcrel and tLEApcrel are re-materializable. This makes it possible to hoist more loads during machine LICM. 2010-05-19 07:28:01 +00:00
X86 Add full bss data support for darwin tls variables. 2010-05-22 00:10:22 +00:00
XCore