Rafael Espindola 812ddcc50f Revert "Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). Including following 14 instructions: 4 ld1 insts: load multiple 1-element structure to sequential 1/2/3/4 registers. ld2/ld3/ld4: load multiple N-element structure to sequential N registers (N=2,3,4). 4 st1 insts: store multiple 1-element structure from sequential 1/2/3/4 registers. st2/st3/st4: store multiple N-element structure from sequential N registers (N = 2,3,4)." ... This reverts commit r192352. It broke the build. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192354 91177308-0d34-0410-b5e6-96231b3b80d8		2013-10-10 15:15:17 +00:00
..
Analysis
AsmParser	Add a GlobalAlias::isValidLinkage to reduce code duplication.	2013-10-09 16:07:32 +00:00
Bitcode
CodeGen	Debug Info: In DIBuilder, the context and type fields of template_type and	2013-10-09 19:46:28 +00:00
DebugInfo
ExecutionEngine
IR	Debug Info: In DIBuilder, the context and type fields of template_type and	2013-10-09 19:46:28 +00:00
IRReader
Linker
LTO
MC
Object
Option
Support
TableGen
Target	Revert "Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). Including following 14 instructions: 4 ld1 insts: load multiple 1-element structure to sequential 1/2/3/4 registers. ld2/ld3/ld4: load multiple N-element structure to sequential N registers (N=2,3,4). 4 st1 insts: store multiple 1-element structure from sequential 1/2/3/4 registers. st2/st3/st4: store multiple N-element structure from sequential N registers (N = 2,3,4)."	2013-10-10 15:15:17 +00:00
Transforms	Fix a bug in Dead Argument Elimination.	2013-10-09 17:21:44 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile