llvm-6502/test
Evan Cheng 5de728cfe1 Emit an error is asm parser parsed X86_64 only registers, e.g. %rax, %sil.
This can happen in cases where TableGen generated asm matcher cannot check
whether a register operand is in the right register class. e.g. mem operands.

rdar://8204588


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136292 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 23:22:03 +00:00
..
Analysis
Archive
Assembler
Bindings/Ocaml
Bitcode
BugPoint
CodeGen The vpermilps and vpermilpd have different behaviour regarding the 2011-07-27 00:56:34 +00:00
DebugInfo
ExecutionEngine
Feature Merge the contents from exception-handling-rewrite to the mainline. 2011-07-27 20:18:04 +00:00
FrontendC++
FrontendObjC
FrontendObjC++
Integer
lib
Linker
LLVMC
MC Emit an error is asm parser parsed X86_64 only registers, e.g. %rax, %sil. 2011-07-27 23:22:03 +00:00
Object
Other
Scripts
TableGen
Transforms Teach the ConstantMerge pass about alignment. Fixes PR10514! 2011-07-27 19:47:34 +00:00
Unit
Verifier
CMakeLists.txt
lit.cfg
lit.site.cfg.in
Makefile
Makefile.tests
site.exp.in
TestRunner.sh