Nadav Rotem 815af82b74 Improve code generation for vselect on SSE2: ... When checking the availability of instructions using the TLI, a 'promoted' instruction IS available. It means that the value is bitcasted to another type for which there is an operation. The correct check for the availablity of an instruction is to check if it should be expanded. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142542 91177308-0d34-0410-b5e6-96231b3b80d8		2011-10-19 20:43:16 +00:00
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Alpha
ARM	Use literal pool loads instead of MOVW/MOVT for materializing global addresses when optimizing for size.	2011-10-19 14:11:07 +00:00
Blackfin
CBackend
CellSPU	Enable element promotion type legalization by deafault.	2011-10-16 20:31:33 +00:00
CPP
Generic	Remove the the test which checks the saving of a vector of booleans into memory.	2011-10-16 19:06:06 +00:00
MBlaze
Mips	Test cases for 64-bit load and store instructions.	2011-10-11 01:52:31 +00:00
MSP430
PowerPC	use FileCheck and not grep in new tests	2011-10-17 16:01:41 +00:00
PTX	PTX: Fix disabling of MAD instruction selection	2011-10-18 13:39:20 +00:00
SPARC
SystemZ
Thumb	Revert r141529. This is causing failures in the test-suite, like bigstack and ReedSolomon. Boo...	2011-10-11 21:40:47 +00:00
Thumb2	ARM Darwin default relocation model is PIC.	2011-09-30 17:41:35 +00:00
X86	Improve code generation for vselect on SSE2:	2011-10-19 20:43:16 +00:00
XCore