mirror of
https://github.com/c64scene-ar/llvm-6502.git
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700ed80d3d
to TargetFrameLowering, where it belongs. Incidentally, this allows us to delete some duplicated (and slightly different!) code in TRI. There are potentially other layering problems that can be cleaned up as a result, or in a similar manner. The refactoring was OK'd by Anton Korobeynikov on llvmdev. Note: this touches the target interfaces, so out-of-tree targets may be affected. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175788 91177308-0d34-0410-b5e6-96231b3b80d8
49 lines
1.6 KiB
C++
49 lines
1.6 KiB
C++
//===-- Mips16RegisterInfo.h - Mips16 Register Information ------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the Mips16 implementation of the TargetRegisterInfo class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef MIPS16REGISTERINFO_H
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#define MIPS16REGISTERINFO_H
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#include "MipsRegisterInfo.h"
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namespace llvm {
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class Mips16InstrInfo;
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class Mips16RegisterInfo : public MipsRegisterInfo {
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const Mips16InstrInfo &TII;
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public:
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Mips16RegisterInfo(const MipsSubtarget &Subtarget,
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const Mips16InstrInfo &TII);
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bool requiresRegisterScavenging(const MachineFunction &MF) const;
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bool requiresFrameIndexScavenging(const MachineFunction &MF) const;
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bool useFPForScavengingIndex(const MachineFunction &MF) const;
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bool saveScavengerRegister(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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MachineBasicBlock::iterator &UseMI,
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const TargetRegisterClass *RC,
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unsigned Reg) const;
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private:
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virtual void eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo,
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int FrameIndex, uint64_t StackSize,
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int64_t SPOffset) const;
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};
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} // end namespace llvm
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#endif
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