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5ac065a797
mips16 and MipsSETargetLowering is for mips32/64. No functionality changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176917 91177308-0d34-0410-b5e6-96231b3b80d8
47 lines
1.6 KiB
C++
47 lines
1.6 KiB
C++
//===-- MipsSEISelLowering.h - MipsSE DAG Lowering Interface ----*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// Subclass of MipsTargetLowering specialized for mips32/64.
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//
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//===----------------------------------------------------------------------===//
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#ifndef MipsSEISELLOWERING_H
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#define MipsSEISELLOWERING_H
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#include "MipsISelLowering.h"
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namespace llvm {
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class MipsSETargetLowering : public MipsTargetLowering {
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public:
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explicit MipsSETargetLowering(MipsTargetMachine &TM);
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virtual bool allowsUnalignedMemoryAccesses(EVT VT, bool *Fast) const;
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virtual MachineBasicBlock *
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EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *MBB) const;
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private:
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virtual bool
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isEligibleForTailCallOptimization(const MipsCC &MipsCCInfo,
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unsigned NextStackOffset,
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const MipsFunctionInfo& FI) const;
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virtual void
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getOpndList(SmallVectorImpl<SDValue> &Ops,
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std::deque< std::pair<unsigned, SDValue> > &RegsToPass,
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bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage,
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CallLoweringInfo &CLI, SDValue Callee, SDValue Chain) const;
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MachineBasicBlock *emitBPOSGE32(MachineInstr *MI,
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MachineBasicBlock *BB) const;
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};
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}
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#endif // MipsSEISELLOWERING_H
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