Tim Northover 6ff3ac67e0 AArch64: add BFC alias for the BFI/BFM instructions. ... Unlike 32-bit ARM, AArch64 can use wzr/xzr to implement this without the need for a separate instruction. rdar://18679590 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236245 91177308-0d34-0410-b5e6-96231b3b80d8		2015-04-30 18:28:58 +00:00
..
AArch64	AArch64: add BFC alias for the BFI/BFM instructions.	2015-04-30 18:28:58 +00:00
ARM	Write sections mostly in one pass.	2015-04-30 14:21:49 +00:00
AsmParser	[MC] Use LShr for constant evaluation of ">>" on ELF/arm64--darwin.	2015-04-28 01:37:11 +00:00
COFF	Add a proper fix for pr23025.	2015-04-17 11:27:13 +00:00
Disassembler	AArch64: add BFC alias for the BFI/BFM instructions.	2015-04-30 18:28:58 +00:00
ELF	Write sections mostly in one pass.	2015-04-30 14:21:49 +00:00
Hexagon	Expand MUX instructions early on Hexagon	2015-03-31 13:35:12 +00:00
MachO	MC: For variable symbols, maintain MCSymbol::Section as a cache.	2015-04-03 01:46:11 +00:00
Markup
Mips	[mips][mips64r6] Sorted instructions in test. NFC.	2015-04-30 10:23:48 +00:00
PowerPC	Use CIE version 1 for .eh_frame.	2015-04-27 22:04:24 +00:00
R600	R600/SI: Add missing -mcpu=SI to assembler test	2015-04-23 19:33:55 +00:00
Sparc	Make Sparc assembler accept parenthesized constant expressions.	2015-04-29 18:48:29 +00:00
SystemZ	[SystemZ] Support transactional execution on zEC12	2015-04-01 12:51:43 +00:00
X86	IR: Give 'DI' prefix to debug info metadata	2015-04-29 16:38:44 +00:00