Chris Lattner 818d42f1e8 Fix switch lowering to order cases in zext order, which is how we emit the ... comparisons. This fixes an infinite loop on CodeGen/Generic/switch-lower.ll and PR1197 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34216 91177308-0d34-0410-b5e6-96231b3b80d8		2007-02-13 01:05:56 +00:00
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DAGCombiner.cpp	Move SimplifySetCC to TargetLowering and allow it to be shared with legalizer.	2007-02-08 22:13:59 +00:00
LegalizeDAG.cpp	Make use of TLI.SimplifySetCC() in LegalizeSetCCOperands().	2007-02-08 22:16:19 +00:00
Makefile	For PR780:	2006-07-26 16:18:00 +00:00
ScheduleDAG.cpp	switch the VRBaseMap in the scheduler from an std::map to a DenseMap. This	2007-02-04 08:47:20 +00:00
ScheduleDAGList.cpp	switch the sched unit map over to use a DenseMap instead of std::map. This	2007-02-03 01:34:13 +00:00
ScheduleDAGRRList.cpp	switch the sched unit map over to use a DenseMap instead of std::map. This	2007-02-03 01:34:13 +00:00
ScheduleDAGSimple.cpp	switch the VRBaseMap in the scheduler from an std::map to a DenseMap. This	2007-02-04 08:47:20 +00:00
SelectionDAG.cpp	Introduce new UnarySDNode/BinarySDNode/TernarySDNode nodes, which coallocate	2007-02-04 08:35:21 +00:00
SelectionDAGISel.cpp	Fix switch lowering to order cases in zext order, which is how we emit the	2007-02-13 01:05:56 +00:00
SelectionDAGPrinter.cpp	Removing even more <iostream> includes.	2006-12-07 20:04:42 +00:00
TargetLowering.cpp	Move SimplifySetCC to TargetLowering and allow it to be shared with legalizer.	2007-02-08 22:13:59 +00:00