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5792f51e12
Also, if the compare is the only use, LSR would place the iv increment instruction before the compare instead in the latch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71485 91177308-0d34-0410-b5e6-96231b3b80d8
52 lines
1.7 KiB
LLVM
52 lines
1.7 KiB
LLVM
; RUN: llvm-as < %s | llc -march=x86 > %t
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; RUN: not grep neg %t
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; RUN: not grep sub.*esp %t
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; RUN: not grep esi %t
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; RUN: not grep push %t
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; This corresponds to:
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;int t(int a, int b) {
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; while (a != b) {
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; if (a > b)
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; a -= b;
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; else
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; b -= a;
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; }
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; return a;
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;}
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define i32 @t(i32 %a, i32 %b) nounwind {
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entry:
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%tmp1434 = icmp eq i32 %a, %b ; <i1> [#uses=1]
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br i1 %tmp1434, label %bb17, label %bb.outer
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bb.outer: ; preds = %cond_false, %entry
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%b_addr.021.0.ph = phi i32 [ %b, %entry ], [ %tmp10, %cond_false ] ; <i32> [#uses=5]
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%a_addr.026.0.ph = phi i32 [ %a, %entry ], [ %a_addr.026.0, %cond_false ] ; <i32> [#uses=1]
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br label %bb
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bb: ; preds = %cond_true, %bb.outer
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%indvar = phi i32 [ 0, %bb.outer ], [ %indvar.next, %cond_true ] ; <i32> [#uses=2]
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%tmp. = sub i32 0, %b_addr.021.0.ph ; <i32> [#uses=1]
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%tmp.40 = mul i32 %indvar, %tmp. ; <i32> [#uses=1]
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%a_addr.026.0 = add i32 %tmp.40, %a_addr.026.0.ph ; <i32> [#uses=6]
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%tmp3 = icmp sgt i32 %a_addr.026.0, %b_addr.021.0.ph ; <i1> [#uses=1]
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br i1 %tmp3, label %cond_true, label %cond_false
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cond_true: ; preds = %bb
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%tmp7 = sub i32 %a_addr.026.0, %b_addr.021.0.ph ; <i32> [#uses=2]
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%tmp1437 = icmp eq i32 %tmp7, %b_addr.021.0.ph ; <i1> [#uses=1]
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%indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
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br i1 %tmp1437, label %bb17, label %bb
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cond_false: ; preds = %bb
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%tmp10 = sub i32 %b_addr.021.0.ph, %a_addr.026.0 ; <i32> [#uses=2]
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%tmp14 = icmp eq i32 %a_addr.026.0, %tmp10 ; <i1> [#uses=1]
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br i1 %tmp14, label %bb17, label %bb.outer
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bb17: ; preds = %cond_false, %cond_true, %entry
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%a_addr.026.1 = phi i32 [ %a, %entry ], [ %tmp7, %cond_true ], [ %a_addr.026.0, %cond_false ] ; <i32> [#uses=1]
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ret i32 %a_addr.026.1
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}
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