Richard Osborne c8007ab582 Add intrinsics for the zext / sext instructions. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135476 91177308-0d34-0410-b5e6-96231b3b80d8		2011-07-19 13:28:50 +00:00
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CodeGen	Add intrinsics for the zext / sext instructions.	2011-07-19 13:28:50 +00:00
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FrontendC	More minor adjustments.	2011-07-16 07:28:35 +00:00
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Linker	fix rdar://9776316 - type remapping needed for inline asm blobs,	2011-07-15 23:18:40 +00:00
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MC	Make the disassembler able to disassemble a bunch of instructions with names in the TableGen files containing "64" on x86-32. This includes a bunch of x87 instructions, like fld, and a bunch of SSSE3 instructions on MMX registers like pshufb. Part of PR8873.	2011-07-16 02:41:28 +00:00
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Transforms	Remove bogus test: for all possible inputs of %X, the 'sub nsw' is guaranteed	2011-07-19 08:22:57 +00:00
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