mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-28 04:33:05 +00:00
1a8adcb569
Another batch with no code changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206381 91177308-0d34-0410-b5e6-96231b3b80d8
139 lines
3.1 KiB
LLVM
139 lines
3.1 KiB
LLVM
; RUN: llc -verify-machineinstrs -O0 < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AARCH64
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; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64-apple-ios7.0 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-ARM64
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define i64 @test0() {
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; CHECK-LABEL: test0:
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; Not produced by move wide instructions, but good to make sure we can return 0 anyway:
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; CHECK: mov x0, xzr
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ret i64 0
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}
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define i64 @test1() {
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; CHECK-LABEL: test1:
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; CHECK-AARCH64: movz x0, #1
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; CHECK-ARM64: orr w0, wzr, #0x1
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ret i64 1
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}
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define i64 @test2() {
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; CHECK-LABEL: test2:
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; CHECK-AARCH64: movz x0, #65535
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; CHECK-ARM64: orr w0, wzr, #0xffff
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ret i64 65535
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}
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define i64 @test3() {
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; CHECK-LABEL: test3:
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; CHECK-AARCH64: movz x0, #1, lsl #16
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; CHECK-ARM64: orr w0, wzr, #0x10000
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ret i64 65536
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}
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define i64 @test4() {
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; CHECK-LABEL: test4:
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; CHECK-AARCH64: movz x0, #65535, lsl #16
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; CHECK-ARM64: orr w0, wzr, #0xffff0000
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ret i64 4294901760
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}
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define i64 @test5() {
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; CHECK-LABEL: test5:
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; CHECK-AARCH64: movz x0, #1, lsl #32
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; CHECK-ARM64: orr x0, xzr, #0x100000000
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ret i64 4294967296
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}
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define i64 @test6() {
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; CHECK-LABEL: test6:
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; CHECK-AARCH64: movz x0, #65535, lsl #32
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; CHECK-ARM64: orr x0, xzr, #0xffff00000000
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ret i64 281470681743360
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}
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define i64 @test7() {
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; CHECK-LABEL: test7:
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; CHECK-AARCH64: movz x0, #1, lsl #48
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; CHECK-ARM64: orr x0, xzr, #0x1000000000000
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ret i64 281474976710656
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}
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; A 32-bit MOVN can generate some 64-bit patterns that a 64-bit one
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; couldn't. Useful even for i64
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define i64 @test8() {
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; CHECK-LABEL: test8:
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; CHECK: movn w0, #60875
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ret i64 4294906420
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}
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define i64 @test9() {
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; CHECK-LABEL: test9:
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; CHECK: movn x0, #0
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ret i64 -1
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}
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define i64 @test10() {
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; CHECK-LABEL: test10:
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; CHECK: movn x0, #60875, lsl #16
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ret i64 18446744069720047615
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}
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; For reasonably legitimate reasons returning an i32 results in the
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; selection of an i64 constant, so we need a different idiom to test that selection
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@var32 = global i32 0
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define void @test11() {
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; CHECK-LABEL: test11:
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; CHECK-AARCH64: mov {{w[0-9]+}}, wzr
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; CHECK-ARM64: str wzr
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store i32 0, i32* @var32
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ret void
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}
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define void @test12() {
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; CHECK-LABEL: test12:
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; CHECK-AARCH64: movz {{w[0-9]+}}, #1
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; CHECK-ARM64: orr {{w[0-9]+}}, wzr, #0x1
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store i32 1, i32* @var32
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ret void
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}
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define void @test13() {
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; CHECK-LABEL: test13:
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; CHECK-AARCH64: movz {{w[0-9]+}}, #65535
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; CHECK-ARM64: orr {{w[0-9]+}}, wzr, #0xffff
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store i32 65535, i32* @var32
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ret void
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}
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define void @test14() {
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; CHECK-LABEL: test14:
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; CHECK-AARCH64: movz {{w[0-9]+}}, #1, lsl #16
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; CHECK-ARM64: orr {{w[0-9]+}}, wzr, #0x10000
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store i32 65536, i32* @var32
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ret void
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}
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define void @test15() {
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; CHECK-LABEL: test15:
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; CHECK-AARCH64: movz {{w[0-9]+}}, #65535, lsl #16
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; CHECK-ARM64: orr {{w[0-9]+}}, wzr, #0xffff0000
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store i32 4294901760, i32* @var32
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ret void
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}
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define void @test16() {
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; CHECK-LABEL: test16:
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; CHECK: movn {{w[0-9]+}}, #0
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store i32 -1, i32* @var32
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ret void
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}
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define i64 @test17() {
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; CHECK-LABEL: test17:
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; Mustn't MOVN w0 here.
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; CHECK-AARCH64: movn x0, #2
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; CHECK-ARM64: orr x0, xzr, #0xfffffffffffffffd
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ret i64 -3
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}
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